# Tri-State Detection

Some of you may have read my answer here to detect when two digital signals are either high or low, i.e. not both tri-state.

One method uses window comparators the other opto-couplers to detect when the line is actually driven. The first seems overly complex and I'm not overly keen on the LED currents in the second. Whatever the circuit is, it should not adversely affect the original signal.

I have been puzzling with this since then trying to come up with some simple discrete solution to this riddle, but I can't seem to come up with a discrete circuit that does not interfere with itself, that is, the low detector trips the high detector, or the high detector feeds current to the low one.

EDIT: To clarify, logic is one signal in, one output TRUE if input is floating.

Does anyone know how, or can figure out how, to do this with minimal components.

• An idea: put the emitters of a NPN and a PNP transistor to the common point, base to Vcc/GND via a resistor. Two outputs at the collectors. Oct 22, 2017 at 0:50
• @Janka single output though. But you would need to draw it for me to be sure what you mean. Oct 22, 2017 at 0:56
• Isn't it sufficient to have one of those outputs signal the enable state? Oct 22, 2017 at 0:59
• @Janka no logic needs to be one signal in one out true if input is floating. Oct 22, 2017 at 1:13
• Allowing the tri-state to idle @ half-Vdd would make it much easier. Have solved this case for RS232 lines, which may be driven or open....only lighting breakout box LEDs if lines are driven. However, half-Vdd is a no-no for most logic types, so you are forgiven for nixing this idea. Its a toughie! Oct 22, 2017 at 1:59

Since all these answers are dependent on how "tri-state" tri-state is, I am starting to think the opto-coupler method, that is more current driven, is not so bad. Something like an LDA100 is bipolar with 1mA on current and minimum 33% current transfer ratio.

"Slow" though, 7/20uS.

simulate this circuit – Schematic created using CircuitLab

• Speed isn't an issue for the motor driver from the original question, and neither is power for the enabled state. Oct 22, 2017 at 19:06
• @Janka ya but I'm more worried about having it's inputs hanging around 2.5V too long in some of these solutions. Oct 22, 2017 at 21:47

A simple tri-state indicator for a 5 V logic circuit.

simulate this circuit – Schematic created using CircuitLab

Figure 1. Would this work?

• If output is high then D2 breaks down and Q4 turns on pulling TRI low.
• If output is low then D1 breaks down, Q5 turns on turning on Q4 pulling TRI low.
• If output is in tri-state then neither transistor turns on and TRI pulls high.

As a matter of interest (but a bit off-topic on this question) here's another non-transistor option that will work for some logic families.

simulate this circuit

Figure 2. A simple XOR tri-state detector.

• With the resistor values shown in Figure 2 this circuit requires a threshold of V+/2.
• With IN floating / tri-stated the upper and lower XOR inputs are pulled to 2/3 V+ (high) and 1/3 V+ (low) respectively. The output will turn on.
• If IN is pulled high the upper and lower inputs go to V+ (high) and 2/3 V+ (high) so the output turns off.
• If IN is pulled low the upper and lower inputs go to 1/3 V+ (low) and 0 (low) so the output turns off.
• :) ha.. seems to work well enough in this simulator. It is of course Vcc specific.. but hey, it is discrete, so what. Oct 22, 2017 at 13:23
• I guess the Zeners could also be a little bit lower to narrow the band. Oct 22, 2017 at 13:25
• Issue with this and most of the others is it depends on how tri-state tri-state is. You need LARGE resistance to ground or rail on the input. Open circuit it works great. Oct 22, 2017 at 13:52
• @Trevor You may not want to lower the zeners. Doing so might cause the pair to zener as Vcc would be enough by itself to do that.
– jonk
Oct 22, 2017 at 14:48
• @Trevor One more comment. I'd define "tristate" as its inability to sink or source current. Not as a voltage level, per se. So my half-baked idea uses that feature and a current-based hysteresis, not a voltage band.
– jonk
Oct 22, 2017 at 15:02

Here is one way, may not be the best, assuming 5V CMOS levels.

simulate this circuit – Schematic created using CircuitLab

But personally, I'd use a dual comparator eg. LM393 with wired-AND outputs. 6 resistors (maybe just a single network) and one chip. Or, alternately the two transistors, each with base resistors and two load resistors, similar to the above and do the logic with a 3/4 a 74HC00.

• Yup that one works.. Oct 22, 2017 at 2:41
• Ya the comparator method was my first guess on the linked question. Oct 22, 2017 at 2:46
• @Trevor The comparator I mentioned is open-collector so you can simplify the circuit by getting rid of the diodes in your linked answer- just a single pullup for both outputs connected together. Oct 22, 2017 at 3:02
• YA but the logic in that particular example is OR not and. Unless of course I messed up.. which is always a possibility. Oct 22, 2017 at 3:05
• You are still winning with the part count, but I like the transition voltages better on mine. Oct 22, 2017 at 12:27

I would try to separate the three states with an emitter-coupled series of a NPN and PNP transistor as the input stage.

simulate this circuit – Schematic created using CircuitLab

When both the push and the pull transistor inside the µC are open (Hi-Z), current runs from Vdd through the emitter of the NPN into the emitter of the PNP into the base to GND. We have collector currents on both the NPN and the PNP.

When the push transistor in the µC is conducting, there isn't a potential between base and emitter of the NPN so we don't have a collector current here.

Same for the pull transistor and the PNP.

EDIT: Added a simple output stage.

• Sorry no worky,, you have two emitter diodes in series. Oct 22, 2017 at 1:19
• with no input both outs settle to half rail. Oct 22, 2017 at 1:30
• And? Half-rail is enough to keep both transistors conducting. Oct 22, 2017 at 1:37
• That is not a logic signal though is it..... Oct 22, 2017 at 1:39
• I thought it was about separating the three states mostly. But of course, one had to copy the internals of a 74xx gate to make a nice logic signal of it. And vice-versa for the PNP side. Oct 22, 2017 at 1:41

I finally came up with one based on Janka's thoughts. Tighter switching level than Spehro's but way more parts.

simulate this circuit – Schematic created using CircuitLab

Now I just need two of those on a 6 pin soic.....please.

After sleeping on it, I realized I can reduce it quite a bit.

simulate this circuit

I have to say I like the transition voltages more with this circuit. The others are diode drop from the rail so are more sensitive to the line being driven hard enough.

• If this is for a real application you might want to try simulating it with maximum output leakage in the high-Z condition. Might need a couple BE resistors to tame it. Oct 22, 2017 at 12:31
• @SpehroPefhany would that matter with the bases tied together. Oct 22, 2017 at 12:34
• Yeah, I think it might. Oct 22, 2017 at 12:36
• @SpehroPefhany it certainly does not take much CE leakage to mess it up. I don't overly trust this simulator, I should try it in LTSPICE Oct 22, 2017 at 12:59
• @SpehroPefhany issue with most of these is how much resistance tri-state is.. So far your circuit is least sensitive. Oct 22, 2017 at 13:54