# SAR ADC has non-linearity around the middle of the range

I'm using a SAR ADC in STM32L433 chip and it exhibits a strange nonlinearity around the middle of the range which I can't explain.

It's a 12bit ADC with 64x oversampling and 2 bit shift which effectively makes it 16bit. The nonlinearity is around 32768 (2^15) which is in the middle of the 16bit range. It's almost looks like clamping to the 32768 except that a couple of seconds later it'll cross the line nicely. It seems like approaching the 32768 line from any side is a problem.

What could cause this? The red line is the 32768 line for reference. The green line is the signal. 100Hz sample rate, the measured signal is around 1Hz.

Edit2: I did an experiment with driving the input with a ramp.(might not be linear to begin with but it was continuous) Here is how the looks like when the fit-ed line is subtracted. The big jump is only at the 32k. Why this is the case it still puzzles me. For now the workaround solution is to avoid this range and I'm setting up the AGC to drive the signal above it.

• You should really test (and show us) with a signal that's more predictable and clean. Maybe a simple RC discharge through a buffer. Hard to see if there actually is a problem here, or if the red line is creating optical illusions. – pipe Oct 22 '17 at 7:19
• SAR ADCs do that. How big is the nonlinearity and how does it compare with the spec for the ADC? If it's greater than spec, you may need to clean up external electronics (power supplies, signal source impedance etc). – Brian Drummond Oct 22 '17 at 8:51
• The ADC is a capacitive redistribution type; these have a particular error that may show up where the most significant bit changes (in the middle of the range for a unipolar output); this is usually due to the VREF or ADC power input being unable to cope with the current 'gulp' inherent in the conversion process. – Peter Smith Oct 23 '17 at 12:42

This was due to a too high input impedance and/or to short sample time. It did not have time to fill the sample capacitor fully.

Averaging does not magically give you a higher resolution ADC. All it does it averages white noise with $\sqrt{n}$, where $n$ is the number of samples. All other types of noise (like $1/f$ noise) and inaccuracies are not independent and thus do not average out. As you have seen, the non-linearities of the ADC, which limit its precision to 12bit (or probably less) are still there after averaging.

Now, where do these non-linearities come from? For SAR-ADCs it's mostly the sizing of the capacitors not being exact powers of 2. As it is easy to see, even the largest capacitor, which decides whether you are in the top or bottom half of the range, has to have the same absolute accuracy as the smallest one. Unfortunately, physics makes things have a relative accuracy. I.e. the largest capacitor will have an absolute accuracy that is by a factor of $2^N$ worse than the smallest transistor. And you see this inaccuracy when you pass through the mid-point of the range as a sudden jump in the transfer function.

• The strange thing is that I have two boards with the exact same behavior, so it's hard to attribute it to the SAR capacitor tolerances.Also it looks like a compression around the 2^15 line, there are no jumps, the signal is still smooth. – pkuhar Oct 22 '17 at 19:34
• Not really. Part tolerances in semiconductors are neither completely random nor uncorrelated. If you have two parts from the same lot, you will likely get very similar if not the same behavior. – Attila Kinali Oct 27 '17 at 22:51

Experiment with your bypass capacitors, on DVDD, on AVDD, on VREF. Examine your ground plane. You are using a ground plane, are you not?

Bypass the Analog Vin to the GND plane. Use some slits to keep DGND currents away from AGND pins and VREF- pins.

• The circuit has a dedicated analog, power, analog ground plane etc. – pkuhar Oct 22 '17 at 19:37