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I looked up information about my microcontroller AT89S52 and I can't seem to figure out the maximum speed I can operate a GPIO pin at.

I'm running it with a 22.1184Mhz clock, and I notice sometimes when I modify a port value, it won't update right away without adding several NOP statements but I don't want to guess. I want to know values so I can adjust code.

This is information from the datasheet I got:

datasheet

It lists the pin capacitance, but I see nothing about the pin resistance. How do I calculate the resistance here? or is there another way to calculate the maximum reliable pin processing speed?

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    \$\begingroup\$ Probably doesn't have anything to do with the capacitance. Look at the instruction set to determine if the asm command which loads that register with the output values takes > 1 cycle. Inspect the architecture. \$\endgroup\$ – Andrew Pikul Oct 23 '17 at 5:44
  • \$\begingroup\$ electronics.stackexchange.com/questions/25551/… check this link , i think you will find your answer. \$\endgroup\$ – Bhura Oct 23 '17 at 5:44
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    \$\begingroup\$ How do you determine if there is a delay between "modify port value", and actual "update" of port value? How do you know when do you actually modify the port value? \$\endgroup\$ – Ale..chenski Oct 23 '17 at 5:46
  • \$\begingroup\$ Internal impedance of GPIO driver can be estimated from datasheet VoL = 0.45V when IoL = 1. 6 mA. 450 mV / 1.6 mA = 280 Ohms. Port0 has about 140 Ohms. Driving HIGH has much higher impedance (looks like about 3 kOhms), again it can be estimated by voltage drop at specified current. But all this has nothing to do with pin capacitance nor with NOPs. \$\endgroup\$ – Ale..chenski Oct 23 '17 at 5:53
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    \$\begingroup\$ There is no such thing as "at the same time" when you have events at two different (and likely independent) places. You have a classic problem of synchronizing a communication between two clock domains. Check literature for keywords "clock domain crossing". \$\endgroup\$ – Ale..chenski Oct 23 '17 at 14:03
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The datasheet specifies output high current of 60uA at 2.4V for ports 1-3, and 800uA for port 0 (but only in external bus mode). From this you can calculate the equivalent resistances. 5.0V-2.4V = 2.6V. 2.6V/60uA = ~43kΩ. 2.6V/800uA = ~3.3kΩ.

In I/O mode Port 0 is Open Drain, so external pull-up resistors would have to be applied. What is the lowest value pull-up resistor that still allows the pin to pull down to TTL logic 0? Port 0 pins can sink 3.2mA at 0.45V. 5V-0.45V = 4.55V. 4.55V/3.2mA = ~1.4KΩ. The other port pins can sink 1.6mA, so they could have external pull-up resistors as low as ~2.8kΩ.

The 89S52 needs 12 clocks per machine cycle. At 22.1184MHz this corresponds to 0.543us. 43kΩ x 10pF = 0.43us, so even the weak pull-ups on ports 1-3 should be strong enough to toggle at full speed. However anything connected to a pin (even a scope probe) will have its own capacitance which will increase the rise time.

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  • \$\begingroup\$ anything connected to a pin will have its own capacitance which will increase the rise time. ... That makes sense. So If I hooked a GPIO pin of one 89S52 to a GPIO pin of another 89S52, and one 89S52 changed the state of that pin, then I have to make my program on both 89S52's wait 0.86uS (2 machine cycles) in order for it to recognize the changes on the pin? \$\endgroup\$ – user152879 Oct 23 '17 at 14:05
  • \$\begingroup\$ If you wanted to read the state of the pin on the same MCU, or if you wanted to toggle it up and down, then you would have to wait for at least 1 cycle. 2 cycles would provide a safety margin. The other MCU would probably be reading the signal asynchronously, so there would be at least one cycle of jitter and you might have to hold the output state for 2 cycles or longer to ensure that the receiving MCU detected it (even if the rise time is short). \$\endgroup\$ – Bruce Abbott Oct 23 '17 at 18:30

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