1
\$\begingroup\$

I have two positive edge octal D type flip flops with output enable (they're both 74LS374 chips), and I am wondering if it's possible to enable the output from one chip and clock the other on the same clock pulse, effectively copying the contents from one chip to the other

Thanks

\$\endgroup\$
1
\$\begingroup\$

Well, no. You can't clock the output from one DFF into a second DFF on the same rising-edge.

What you can do, though, is clock the 2nd DFF on the falling edge (i.e. invert the clock signal).

Something like this: RTL

SIM

This way both flip-flops will hold the same data at the next rising edge. Just make sure that your clock pulse width is larger than the gate delays + trace delay from Q1 to D2.

| improve this answer | |
\$\endgroup\$
0
\$\begingroup\$

If you enable the first at the time that you clock the second, you will not copy the contents across. The first output has to be enabled before the second one is clocked, at least tOE(1) + tsu(2) before the second one is clocked, this will ensure that data is valid at the second one in time for it to be clocked in correctly.

The setup and hold times of these flip-flops are designed so that you can connect them output to input, and correctly clock the previous cycle's output across.

| improve this answer | |
\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.