For a 1oz FR-4 PCB, is there an ideal PCB trace width for data lines? For power supplies, I realize wider is usually better, and power planes are preferred. But what about data lines? Is narrower better? Should I simply just use as narrow as the PCB fabricator supports reliably?

I've heard some advantages of using narrower PCB traces, but want to verify:

  1. Narrower lines results in higher resistance, which lowers the likelihood that series resistors are needed, and reduces EMI compared to wider lines.
  2. Narrower lines allow for easier routing, i.e. between other tracks and pads.

Any disadvantages?

Are there uses for different widths for different frequencies -- i.e. SPI/i2c frequencies versus MIPI/USB frequencies?

I have been using the default of 10 mils...that seems kind of too large. Any width to use as a starting point/default? Perhaps 5mils or 6mils? If I use 6 mils, should I also use 6mils minimum trace to trace design rule?

  • \$\begingroup\$ There are a lot of variables, so no. But you might find that there is an ideal width for a certain applications. An example reason to aim for a specific width is when you are dealing with a fixed impedance. \$\endgroup\$
    – Joren Vaes
    Oct 28, 2017 at 17:16

2 Answers 2


The resistance of the traces is seldom important for signals. Wider traces have lower characteristic impedance (transmission line impedance) than narrower traces. Sometimes this matters.

For example USB and ethernet. In those cases, the trace width must be chosen so that the impedance is correct. RF signals, such as GPS or bluetooth or wifi antenna signals, have very exacting trace impedance requirements (usually 50 Ohms). Video signals usually are required to be routed at 75 Ohm impedance if they go off-board.

The second major factor which affects impedance is the distance from trace to the nearest plane. One useful rule of thumb is that a trace will have approximately 50 Ohms impedance when the trace width is double the height from trace to plane. This is for traces on top or bottom, not inner-layer traces. So a 10 mil trace separated from GND by a 5 mil dielectric will be around 50 Ohms characteristic impedance.

For more accurate numbers, you can use a trace impedance calculator online.

There is some relationship with trace width and board cost in mass production. If you need to mass produce PCB's at low cost, the minimum trace width should not be pushed too hard. Best is 5mils, but 4mils is OK, too.

Also, the copper thickness affects the minimum trace width. If you ever use something thicker than 1 oz (35 um) copper, you will want to increase your trace width and spacing. I can't give you the limits off the top of my head, but you can research it if you ever need to do that.


A couple of other disadvantages:

  1. Larger (relatively speaking) effects from manufacturing variation / PCB fiber weave / etc.
  2. Less area to carry away heat from components. (This can be a problem for soldering, too. Tombstoning is much more likely to happen when some pads pull more / less heat than others.)
  3. Harder to rework (only really relevant for prototypes).
  4. More of an impedance mismatch at vias. (Vias tend to have relatively low impedance, and the smaller the trace, the higher the impedance of the trace, and the larger mismatch at vias.) This is more of a problem for traces with high slew rates, in which case you should be avoiding vias where possible anyway... but it isn't always practical. Note that calculating via impedance is fun at the best of times.

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