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I have been trying to use a digital pot to control the volume of an audio signal. I am aware that most digital pots don't take negative voltages and also that digital pots have a high wiper resistance in comparison to analogue pots, so some leaking will probably always occur. Still, I want to make it work as best as possible with my setup, even if not perfect.

I have a mega2560 controlling a digital pot (MCP4241 502) and the audio player (DF Player, a cheap mp3 module). There is a circuit for shifting the DC voltage up (VCC/2) so the digital pot will respond properly. Yet, I'm getting a lot of leakage when the volume is set to 0.

enter image description here I kind of understand the voltage divider to shift the voltages up (R2 / R1 + R2 x Vin so 100K / 200K * 5v = 2.5), but I don't understand what values to choose for the 2 identical resistors. According to an article by Maxim:

"The input impedance of the input resistor network must be large enough so that an external source can drive the signal into the preamplifier. Also, the input capacitor must be large enough that it does not attenuate the low-end frequency response, and the resistance of the R2 resistors must be small enough that it does not attenuate the signal across the digital potentiometer." (https://www.maximintegrated.com/en/app-notes/index.mvp/id/161)

So it seems that the resistance values are determined by impedance, still, I'm not sure how to find out which values to use in my setup. So:

1st: How can I choose the identical resistor values properly for shifting the voltage? What would these values be in my setup?

2nd: Is there anything I can do to attenuate the sound leaking (when volume is set to 0) in my circuit?

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  • \$\begingroup\$ There seems to be a drawing error - The P1W pin on the digipot is connected to Vss. You probably need a capacitor to ground on the R4/R5/P1B net, to keep it stable. \$\endgroup\$ – Peter Bennett Oct 29 '17 at 16:47
  • \$\begingroup\$ Do you really have the MCP4241 Vdd connected to ground? Have you mixed Vss & Vdd up? \$\endgroup\$ – brhans Oct 29 '17 at 16:48
  • \$\begingroup\$ oh sorry, there is a mistake in the drawing, I'm fixing it now! \$\endgroup\$ – Chu Oct 29 '17 at 16:50
  • \$\begingroup\$ it's OK now...I think I drew it too fast :) \$\endgroup\$ – Chu Oct 29 '17 at 16:56
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    \$\begingroup\$ You've got P1B going to a finite impedance, so your '0' position isn't, it's still quite a significant output. Decouple P1B to ground with a big capacitor, polar electrolytic will be fine. \$\endgroup\$ – Neil_UK Oct 29 '17 at 18:32

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