For a simple application of a voltage regulator with 5V in and 3.3V out, I am looking at these three regulators.
They all have different output capacitor requirements.
Regulator #1 (AP2127K-3.3TRG1) Says the following in the datasheet:
"Compatible with Low ESR Ceramic Capacitor: 1μF for CIN and COUT"
And also has this graph of stability range for an output cap of 4.7uF
To me, "Low ESR Ceramic Capacitors" means ceramic capacitors with much lower ESR than 100mOhms. What frequency is this part referring too for it's ESR ratings?
Regulator number 2 (MIC5504-3.3YM5-TR) says this in the datasheet.
"The regulator requires an output capacitor of 1uF or greater to maintain stability. The design is optimized for use with low-ESR ceramic chip capacitors. High ESR capacitors are not recommended because they may cause high-frequency oscillation."
"Stable with 1uF ceramic output capacitors"
I did not see any exact ESR ranges specified. What does this mean? "Low ESR". Regulator number 1 seems to think it's above 100mOhms.
Regulator number 3 (TLV73333PDBVR) says this in the datasheet.
"The TLV733 series is designed with a modern capacitor-free architecture to ensure stability without an input or output capacitor."
This means the regulator control loop is stable with 0 ESR caps and I can put any ceramic cap I want on there.
"However, the TLV733 series is also stable with ceramic output capacitors if an output capacitor is necessary."
Since these are all the same PCB package, I would like to provide alternate part numbers for the one I choose, but the output cap has to work with all of them.
1) What frequencies are the datasheets referring to when they rate the ESR value? Regulator 1 and 2 seem to have different opinions. AVX Corp datasheet lists all tantalum caps ESR at 100kHz. Is this the industry standard frequency for LDO ESR ratings too?
2) I have read app notes that say not to use 0.1uF bypass caps on the output because you can end up with the pole and zero cancelling each other out and the regulator could end up unstable. But most schematics I see have one. Is this because the designer calculates what the zero and pole is or is this normally done in error?
3) Since Regulator #2 says not to use high ESR caps, does that mean regulator #1 and #2 can't use the same output cap? Since #1 would require a minimum ESR greater than the maximum ESR of #2? Even though #2 doesn't specify ESR range.