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I purchased a "usbasp" programmer from AliExpress for use with my ATtiny84A AVR devices. This has the text "USBASP V2.0 LC Technology" screenprinted on the top of the PCB, and it looks very much like this:

usbasp

I have a C232HM (FTDI) cable that I have been using as an avrdude programmer successfully for some time, so I know my AVR devices are working and that I'm using the right pins on the ATtiny84.

Unfortunately I have not been successful with this new programmer. After connecting VCC (with jumper J1 set for 5V), GND, MOSI, MISO, SCK and RESET (and triple-checking!), avrdude provides the following error:

$ avrdude -c usbasp -p attiny84 -vvvv 

avrdude: Version 6.3, compiled on Sep 17 2016 at 02:19:28
         Copyright (c) 2000-2005 Brian Dean, http://www.bdmicro.com/
         Copyright (c) 2007-2014 Joerg Wunsch

         System wide configuration file is "/usr/local/Cellar/avrdude/6.3/etc/avrdude.conf"
         User configuration file is "/Users/me/.avrduderc"
         User configuration file does not exist or is not a regular file, skipping

         Using Port                    : usb
         Using Programmer              : usbasp
avrdude: usbasp_open("usb")
avrdude: seen device from vendor ->www.fischl.de<-
avrdude: seen product ->USBasp<-
         AVR Part                      : ATtiny84
         Chip Erase delay              : 4500 us
         PAGEL                         : P00
         BS2                           : P00
         RESET disposition             : possible i/o
         RETRY pulse                   : SCK
         serial program mode           : yes
         parallel program mode         : yes
         Timeout                       : 200
         StabDelay                     : 100
         CmdexeDelay                   : 25
         SyncLoops                     : 32
         ByteDelay                     : 0
         PollIndex                     : 3
         PollValue                     : 0x53
         Memory Detail                 :

                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           eeprom        65     6     4    0 no        512    4      0  4000  4500 0xff 0xff
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           flash         65     6    32    0 yes      8192   64    128  4500  4500 0xff 0xff
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           signature      0     0     0    0 no          3    0      0     0     0 0x00 0x00
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           lock           0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           lfuse          0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           hfuse          0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           efuse          0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           calibration    0     0     0    0 no          1    0      0     0     0 0x00 0x00

         Programmer Type : usbasp
         Description     : USBasp, http://www.fischl.de/usbasp/

avrdude: usbasp_initialize()
avrdude: usbasp_transmit("USBASP_FUNC_GETCAPABILITIES", 0x00, 0x00, 0x00, 0x00)
avrdude: usbasp_spi_set_sck_period(0)
avrdude: auto set sck period (because given equals null)
avrdude: usbasp_transmit("USBASP_FUNC_SETISPSCK", 0x00, 0x00, 0x00, 0x00)
avrdude: warning: cannot set sck period. please check for usbasp firmware update.
avrdude: usbasp_transmit("USBASP_FUNC_CONNECT", 0x00, 0x00, 0x00, 0x00)
avrdude: usbasp_program_enable()
avrdude: usbasp_transmit("USBASP_FUNC_ENABLEPROG", 0x00, 0x00, 0x00, 0x00)
         <= [01] 
avrdude: error: program enable: target doesn't answer. 1 
avrdude: initialization failed, rc=-1
         Double check connections and try again, or use -F to override
         this check.

avrdude: usbasp_close()
avrdude: usbasp_transmit("USBASP_FUNC_DISCONNECT", 0x00, 0x00, 0x00, 0x00)

avrdude done.  Thank you.

It doesn't work with an external 5V supply (J1 removed), or with J1 set for 3.3V either.

With my scope, I can see that the clock is running at about 92.6 kHz, but the MISO and MOSI signals are very low in amplitude - about 1.1V for MISO and 0.8V for MOSI. These voltages seem a bit low to me:

scope

I read that J3 can be used to set the programmer to "slow" mode (note that the ATtiny84 I'm currently trying to program is already running at 8 MHz from internal oscillator). However when adding J3, I don't see any change to the clock rate - it still runs at about 92.6 kHz.

From what I've read, the "Chinese" usbasp programmers tend to ship with some version of the software that enables clock speed detection. I'm not sure whether this translates to support for the "-B" option though, because no matter what -B value I provide, the scope shows the clock still running at 92.6 kHz.

I have made sure there's no other circuitry interfering with the programmer. I've also tried a second, "fresh" ATtiny84 (so fuses still set for 1MHz) with no success either. Yet the C232HM programmer works fine.

So nothing I've read seems to correlate with what I'm seeing with my device. I'm wondering if those MOSI/MISO voltages are too low (and why) and I'm also puzzled as to why neither J3 nor -B seems to affect the clock rate.

What could be wrong? What else can I investigate?

EDIT: added some more information.

The ATtiny receives around 5.1V from the programmer. This does not seem to fluctuate or droop during the process.

Traces with ATtiny84 in place:

  • Yellow: SCL (USBasp pin 7 / ATtiny84 pin 9) - 5V
  • Cyan: MISO (USBasp pin 9 / ATtiny84 pin 8) - ~1.1V
  • Magenta: MOSI (USBasp pin 1 / ATtiny84 pin 7) - ~3.3V
  • Blue: RESET (USBasp pin 5 / ATtiny84 pin 4) - 5V

full

The RESET line is pulled low twice by the programmer, and the MOSI line goes to approx 3.3V. Then after approx. 100ms the SCL starts pulsing at 0-5V, approx. 94 kHz, and there is activity on both the MOSI and MISO lines, but it looks pretty awful:

close up

Without the ATtiny84 in place (SLK, RESET, MISO and MOSI floating), the scope looks like this:

no ATtiny

The magenta trace is MOSI and it rises to about 5V, but looks ugly (perhaps because it's floating):

no ATtiny zoomed

There's some sort of signal on MISO too, perhaps interference from MOSI?

I put a 330kOhm resistor between MOSI and GND and a 1MOhm between MISO and GND (still no ATtiny present) and it tidied up the traces a little:

with resistors

What I don't really understand though is why the MOSI signal (magenta) is so unclean, and why there's some clock signal on MISO (cyan).

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  • \$\begingroup\$ 1.1V and 0.8V isn't just 'a bit' low, it's much too low. What (measured) supply voltage does the ATTiny get when connected to the programmer? What does RESET do? What does MOSI look like at the USBASP when disconnected from the ATtiny? \$\endgroup\$ Nov 9, 2017 at 6:38
  • \$\begingroup\$ I've added some more information to my question which should hopefully answer your questions. Thank you for taking a look. \$\endgroup\$
    – davidA
    Nov 10, 2017 at 5:06
  • \$\begingroup\$ Maybe MISO/MOSI need to have pullups here. That would be a problem in the firmware of the programmer, not using push-pull or internal pullups. \$\endgroup\$
    – Janka
    Nov 10, 2017 at 5:26
  • \$\begingroup\$ With pull-ups on MISO and MOSI, they sit around 4.7-5V with the ATtiny84 in place. Neither is pulled down below about 4.7V. \$\endgroup\$
    – davidA
    Nov 10, 2017 at 6:23
  • \$\begingroup\$ With the 330k pull-down MOSI only reaches about 1.6V when high. Combined with the slow rise and fall times this suggests a series resistance of ~700k. There should be a low value (270 Ohm?) resistor (R5?) on the bottom of the USBASP board in the MOSI line. Can you test this? If the ATtiny is not responding or missing then MISO will be floating, and some crosstalk is to be expected. \$\endgroup\$ Nov 10, 2017 at 8:50

2 Answers 2

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I have been pulling my hairs with a similar issue and since your information helped me get started, I thought I would share my result and hope it can help you. First of all, I am using a USBASP that looks like yours.

I had success with attiny13 and 45. I had no issues with the attiny13 but the attiny45 I got where set by default to use an external clock. That means you must use a crystal (I tested successfully with 8MHz and 16MHz) in order to first talk to the chip. Once you can communicate, you can set the fuses to use the internal clock. Once you have done that, your crystal is no longer required.

That being said, my attiny85 remained silent despite testing 8, 16 and 20Mhz crystals and using the exact same wiring.

Like you I noticed some garbage on MISO. In my screenshot, I used the same colors than you. Attiny85 answering avrdude As you can see, I do get garbage on MISO at first but after a reset and a short delay (~110µs), MISO seems to wake up and behave itself.

As a reference, the command I used to test is:

avrdude -c usbasp -p t85 -B4

The -B4 is important and I tested successfully between -B4 and -B20. It slows down the clock and -B4 was the minimum for me to make it work. I had however chips that did NOT answer with -B4. To be conservative, I started with -B16.

Another interesting point compared to your screenshots is that my reset line is always LOW and briefly goes UP. That seems to be the opposite for you. I did not check whether this is normal behavior for the Attiny84 you use.

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I had the same issue with my Attiny 25. When I added -B 4, my usbasp set a clock to a lower frequency. Looks like the SCK can be set up to 750000 Hz and the chip only works from 187500 Hz and slower. My chip gets recognized even at SCK frequency of 1000 hz. Since I use .bat files to program my chips. I'll just add a -B4 to lower the clock and get working. Thanks for showing me the command.

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    \$\begingroup\$ This does not really answer the situation of the question on this page, which reports that the -B setting has no effect. The depicted clock in the question is quite reasonable; something else is really. Really the reason for using slow clocks with AVR ISP is if the clock division fuse of the target is accidentally programmed, then the ISP clock has to be below the target's clock that will sample it. \$\endgroup\$ Aug 28, 2020 at 20:35

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