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I have seen many of the 4,6,8...layer stack up . Layer 2 prepared as solid GND plane for shorter return current path(reference plane.

What is the reason for layer 2 is ground plane in most of the stack up instead of power plane?

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  • \$\begingroup\$ To absorb EM radiation from layer 1. \$\endgroup\$ – Ignacio Vazquez-Abrams Nov 9 '17 at 13:57
  • \$\begingroup\$ If we considered 4 layer board top,gnd,pwr,bottom layer are stacked. Then we are using bottom layer reference plane as Power so here how it works? \$\endgroup\$ – ramesh6663 Nov 9 '17 at 13:59
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For controlled impedance and low noise you'd like the signal traces to run over a continuous ground plane. In theory the power plane might act in a similar manner, however with many boards it is desirable to split the power plane into different regions, whereas the ground plane is usually left intact (at least up to isolation barriers).

You do not want to run signal traces to run over a break in an AC grounded plane because that can cause problems with EMI as well as signal integrity.

If you have many parts on both sides you may wish the penultimate bottom layer to also be a ground plane.

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As you probably know, a plane is used to reduce the loop area of the high frequency current paths like this: return path simulation

This works with both power and ground plane. You just have different DC offsets. In fact, if your stack up is signal, power, ground, signal, the return current for the top signals will use the power plane as a reference because the loop area will be smaller.

You have to keep that in mind especially when changing layers through vias. The return path changes planes through the closest capacitor between power and ground. This can significantly deteriorate your signal integrity, if the capacitor is far away.

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