How does the PNP transistor in this IR receiver circuit work?

Question

(source: https://circuitdigest.com/electronic-circuits/remote-controlled-light-switch)

How does the BC557 PNP transistor in this circuit work?

Based on the information about PNP transistors that I got so far, the emitter is usually not connected to ground and the collector is usually connected to ground. So the way the PNP transistor is connected in this circuit confuses me.

I understand that the 1 microfarad capacitor discharges and charges after an IR signal is received (e.g., after a button on a TV remote control is pressed). And the purpose of the mentioned capacitor is for the IC to count the IR pulses as 1 pulse. So after the last pulse, the IC's pin 14 should receive a "HIGH" input. But how does the charging and discharging of the capacitor work with the PNP transistor in this circuit? How does the IC's pin 14 receive a positive voltage?

This circuit may be good or bad, but I am only interested in understanding how the 1 microfarad capacitor and the PNP transistor send "HIGH" input to the pin 14 of the IC.

UPDATE
This question is relevant to: Purpose of 1 microfarad capacitor in IR receiver circuit

But this one is more about the PNP transistor. The answer on that other post didn't clarify how the PNP transistor in this circuit works so I asked about it separately.

Answer 1

So you're thinking that the PNP is "upside down"?

I agree with you, note how the arrow in the emitter points in the "wrong" way.

However A PNP still works as a PNP like that!

Only it will have a much lower current gain. Here that's not such an issue as the current through R1 will be larger than the current through R2.

If normally \$\beta\$ (the current gain) is around 200 then in this case (emitter and collector swapped) it will be a lot less like 5 or worse. Then there's basically very little current gain.

In this circuit that is not such an issue as the output of the IR sensor is (probably) an open collector (NPN) output meaning that it pulls to ground. That would discharge C1. C1 is charged (when the IR sensor's output is not pulled low) via R1 and the PNP. That current will also result in a current flowing out of the emitter of the PNP (this emitter now behaves as a collector!) into R2 and that will provide the clock to the 4017's input.

So I agree, looks weird. But does (appear to) work according to that website and comments. I have not tried it myself though.

Answer 2

This circuit doesn't make a lot of sense.

I think the intent was for Q1 to invert the output signal of the IR receiver. The IR receiver has a open drain (or open collector) output. It actively drives the line low when the appropriate IR signal is detected, and leaves it high impedance when not.

When the line is driven low, it looks like that was supposed to draw current from the base, which would cause the transistor to source current out its collector, which would raise the CLK input of U1. However, the transistor has it's emitter and collector flipped. Most BJTs still work with E-C flipped, although at lower gain. In this case, the gain needed is actually less than 1, so this circuit probably works as intended, although probably by accident.

Since dedicated logic chips are used, the inversion between the TSOP output and the CLK input was apparently required. A more normal circuit would use a microcontroller, which should be configurable to either input polarity. In that case only a single pullup resistor would be required.

This circuit is a mess for a number of reasons:

1. The absolute maximum power voltage for these TSOP detectors is 6 V. That is also the maximum for the output pin. Powering one of these from 9 V is totally irresponsible, and really bad design. Some units may work, for a while, some of the time.

2. C1 is in the wrong place. These TSOP sensors are notorious for requiring good power supply decoupling. A small 1 µF ceramic cap between the power and ground pins of the TSOP would have been appropriate. Connecting the cap to the output pin makes little sense. There is no need to filter the output if it is otherwise handled correctly. Perhaps C1 was added in response to observed glitches. However, those are likely due to the missing power supply decoupling in the first place.

3. The relative values of R1 and R2 don't make sense. The transistor would, if used properly, supply some gain. It makes no sense for the base current to be 10x higher than the collector current.

4. There is nothing making sure the transistor is really off when OUT goes to high impedance. Something like 100 kΩ between base and emitter (if emitter and collector were connected properly) would achieve that.

5. The larger circuit (beyond the snippet I copied into this answer) uses another transistor. However, that transistor is also designated Q1. Duh!

Clearly this circuit was designed by someone that didn't know what they were doing, and who apparently didn't even read the TSOP datasheet. Move along. There is nothing to see here.