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As I looked at some 74xxTxx ICs, such as this simple NAND gate, I noticed that the minimum \$V_{OH}\$ decrease as current flowing from the outputs increase.

But, from my understanding of Ohm's law, \$U = RI\$ implies \$\frac {dU}{dI} = R * dI\$, and as \$R \gt 0\$, the more current flows, the greater should tension be at the pin relative to the ground.

I think, because this behavior affect only \$V_{OH}\$ and not \$V_{OL}\$, that it is because when an output is high, it sources current, hence negative current.

But it contradicts my intuitive understanding of electricity, as I believe sense of current doesn't act on resistances, intuitively (else AC circuits would go crazy).

As I'm just a beginner in electronics and electrical fiddling, I'm sure that I must have made a mistake somewhere, but where ? And, if my reasoning is oddly enough correct, how does the 74xxTxx ICs do to achieve this lowering in tension ?

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  • \$\begingroup\$ 74 series logic is CMOS. This means that there is a PMOS between VCC and the output. That PMOS has some resistance when it is on. Let's call the resistance Rds(on). The output voltage is VCC - Iout * Rds(on). Get it? If not let me know and I will write a full answer. \$\endgroup\$ – mkeith Nov 12 '17 at 0:45
  • \$\begingroup\$ Oh, also, this is a minor translation issue. Usually people say "voltage" rather than "tension." You could also say "potential". And rather than "intensity" most people would say "current." You might consider editing your question to make it more compatible with standard terminology. \$\endgroup\$ – mkeith Nov 12 '17 at 0:46
  • \$\begingroup\$ Read carefully. Yes, the current is higher but is everything else the same? \$\endgroup\$ – τεκ Nov 12 '17 at 0:47
  • \$\begingroup\$ Sorry for the translation issue. In french, "voltage" and "courant" are not allowed, so I've grown to intuitively say "tension" et "intensité". I see your formula, and am beginning to understand it. As more current is added, less resistance is "after" the output, and so Rds(on) is a higher portion of the total resistance, and the voltage drop is higher across it. Could you still write an answer please, so I can later mark this question as answered ? \$\endgroup\$ – Sachiko.Shinozaki Nov 12 '17 at 0:57
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    \$\begingroup\$ I am a little familiar with French, so I had no trouble understanding. For your information, in English, "voltage" is common, but "electrical potential" is the absolutely correct term. Most people say "voltage." Likewise, "electrical current" is absolutely correct, but usually people say "current." Some people say "amperage" instead of current, but to my ear that does not sound correct. I recommend using "current" in English. \$\endgroup\$ – mkeith Nov 12 '17 at 2:09
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The behavior of CMOS Voh as current is increased makes sense if you consider that the output has an internal series resistance. It may also help to think of how this would be tested. In order to test Voh vs output current, you would use a programmable load so that you could set the output current as desired and observe the voltage. A partial schematic is like this:

schematic

simulate this circuit – Schematic created using CircuitLab

M1 and M2 represent the internal transistors of the logic gate. When the output is high, M2 will be "on." However, even when it is on, it has some resistance, Rds(on).

Iout represents an external current sink which would be used to test the datasheet parameters. Iout would be adjusted to a specific current, and Vout would be measured at that current. So now, hopefully it seems more intuitive that the output voltage will drop as the current increases. It is due to voltage drop from source to drain of PMOS M2.

We can calculate the output voltage using Ohm's Law, and Kirchoff's Voltage Law.

Vout = VCC - Rds(on) * Iout

Please note that in reality, Rds(on) will also vary with temperature, and when the output current is high, PMOS M2 may also get hot. So don't expect it to be perfectly linear like a normal resistor.

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RdsOn = ΔVo/ΔIo ( or equivalent series resistance, ESR) for the Pch and Nch FETs

ΔVo=Vcc-Voh for "1" and ΔVo=Vol for "0" depends on load current.

e.g. for Voh for TTL loads, Vcc=4.5V (5V-10%)Voh=3.98V Io =-4mA thus RdsOn=(4.5-3.98)/4mA= 520mV/4mA = 130 Ω (max) for Voh or output ="1" (Pch FET)

e.g. for Vol for TTL loads, Vol= 0.26V/4mA = 65 Ω (max) for Vol or output ="0" (Nch FET)

Note that 74HCTxx series is designed to replace TTL IC's with a fanout of 10 loads so the input threshold is 1.5V instead of symmetrical Vcc/2.

74HCxxx is the standard 5V CMOS family with input threshold of Vcc/2 +/- xx%.

Also each std CMOS families have slightly different RdsOn but tend to be symmetrical e.g. 3.3V logic 74ALCxx is closer to 25 Ω while 5V logic 74HCxx is 50 Ω and legacy CD4000 15V family was ~ 300 Ω @ 5V

Nexperia specs for 74HC08 has Vol/Iol= 37.5 Ω (typ), 65 Ω (max) @4.5V , other Mfg's may vary slightly, but these are usually standardized.

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