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I am using standard schematic of level shifter.enter image description here

It is used to communicate with avr and sometimes reset it. Everything works fine except for reset line. After the first pulling down I am not able to make it high again.

Screen from LA: Reset line noise

Closer look: Closer look

I have tested it on three different boards. I have checked everything. Nonetheless reset line is still going bananas.

For me it looks like the transistor is closing and opening quite fast. Why I can not imagine. The only difference between reset and other lines is that it has one more pull up(the first one is on the shifter) through 10k to 5v.

What is going on here? Thanks!

UPDATE

Have revealed that disconnecting arduino/avr from the device results in normal reset line operation. I am trying to load file into avr memory if it makes it clearer.

SCHEMATIC

Connected avr is arduino uno/mega. Here it is its shematic. You should be interested in ICSP connector. For the controlling device I use cc3200-launchlx board from TI. It connects to arduino over ISP connector.

For cc3200 I have this simple shield:

scheme1 scheme2

So.. I pull P61(H_RST) down and it sets reset line low. However when I pull it up after that I get infinite switches between low and high levels on it.

Here is also my handmade atmega16L board schematic which faces the same problem:

atmega16L

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  • \$\begingroup\$ What is driving this? \$\endgroup\$ – Trevor_G Nov 14 '17 at 14:43
  • \$\begingroup\$ 2N7000 is not a good choice. Use a BSS138. \$\endgroup\$ – mkeith Nov 14 '17 at 14:48
  • \$\begingroup\$ The Vgs(th) for the 2N7000 is too high to work reliably in 3.3V circuits. \$\endgroup\$ – mkeith Nov 14 '17 at 14:50
  • \$\begingroup\$ If you approach this as an analog issue, it will make sense. Rather than LA, use scope and Vgs(th) must be <=1V \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Nov 14 '17 at 14:56
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    \$\begingroup\$ I suspect this is a logical problem rather than a level shifter design problem. For example, there's some device you're expecting to drive the RESET line high. When you pull down the RESET line, does that hold this device in the reset state? \$\endgroup\$ – The Photon Nov 14 '17 at 17:03
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If you look closely at the reset circuit you will see it is a simple analog RC delay.

enter image description here

As such, it is really an analog signal. It will therefore hang around in the grey logic area for a while as it transitions. Even without the cap, since the line is only pulled high through resistors, the capacitance of the MOSFET itself will significantly decrease the rise time.

You need to add a Schmidt trigger buffer in there to give you some hysteresis on the signal before you throw it at that level shifter. Otherwise the level shifter will flip on and off with any noise in your general neighborhood.

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  • \$\begingroup\$ Hm.. Sounds very reasonable. Will check it asap. However I do not have rc circuit on my handmade avr board. I've found a schematic and attached it. \$\endgroup\$ – Long Smith Nov 14 '17 at 19:11
  • \$\begingroup\$ @LongSmith reread my answer, your MOSFET is a nice cap all on it's own. \$\endgroup\$ – Trevor_G Nov 14 '17 at 19:12
  • \$\begingroup\$ Something telling me that you are right. I am to check it and then give you know about the results. Thanks! \$\endgroup\$ – Long Smith Nov 14 '17 at 19:24
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    \$\begingroup\$ I asked it many times already ;) However the year after taking my last electronics course has wiped out anything connected to mosfet capacitance from my mind. Sure I recall it much better now. \$\endgroup\$ – Long Smith Nov 14 '17 at 19:34
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    \$\begingroup\$ It took me a while to check but it seems working now! Thanks! \$\endgroup\$ – Long Smith Nov 27 '17 at 16:13
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If you approach this as an analog issue, it will make sense. Rather than LA, use scope and Vgs(th) must be <=1V, ignoring tolerance (3.3 -Vf)/3= 1V.

Rds(on) is always rated well above Vgs(th) is the short answer, since Rds is very high at threshold.

  • usually Vgs = 3x Vgs(th) is adequate for low R , here maybe 2x into 10k.

    Why Vf? look carefully at Vol path to AVR... from right to left.

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  • \$\begingroup\$ I am gonna take a look tomorrow since I have no access to scope right now. \$\endgroup\$ – Long Smith Nov 14 '17 at 17:41
  • \$\begingroup\$ You can disconnect 5V port, ground it and measure 3V port voltage and it should be <=0.8V, the lower it is , the more noise margin. Above this it is prone to ground noise , Common mode stray noise , etc. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Nov 14 '17 at 17:48

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