Suppose you have a Flash chip (NOR flash) which you are using for example for data logging, performing sequential writes regularly on it.

The question is what if the power goes off during a page write: Is it possible to "fix" the page by rewriting the same contents over it?

By my knowledge of Flash devices this should be possible as writes turn cells from 1 to 0, so an incomplete write I think should only drive cells more or less towards zero (so retrying the same pattern again later should only reinforce it).

The exact design is a data logging device which has a large NOR flash array for data storage and FRAM for intermediate storage (small, but supports immediate writes, so data isn't in danger of being lost during periods when the Flash can not accept it).

I can not do a complete erase + rewrite cycle when detecting such a condition (interrupted write) since I have no room to store a complete erase sector which is significantly larger than a write page (64Kbytes versus 256 bytes), so the most straightforward thing to do would be attempting a write again if the previous power off left behind an unfinished page write.

(Detecting the unfinished write is done by polling the chip's status, and maintaining a related state machine in the FRAM, so not by comparing data which might falsely indicate a succesful, but "weak" write due to a later power off during the page write)

  • \$\begingroup\$ Here's a related question with good info. \$\endgroup\$ – bitsmack Nov 16 '17 at 15:07
  • \$\begingroup\$ @bitsmack Thanks, one of the answers is quite interesting: this one. However the chips I am using are Cypress SPI NOR flashes, by their datasheet my approach seems okay. Page programming is described to be possible to be called multiple times on the same page, and the chips even support program / erase suspend which suggests that possibly retrying a broken programming should also be fine. Not sure of course that's why I am asking. \$\endgroup\$ – Jubatian Nov 17 '17 at 9:01

This should have all the info you need: https://cseweb.ucsd.edu/~swanson/papers/DAC2011PowerCut.pdf

It seems to say that you should be safe since your flash uses single level cells.

Considering writes are a pretty fast operation, I think you should dodge the problem instead. I don't know how your power distribution is done, but if your board is powered from, say, 5V which then feeds a 3V3 LDO or switching regulator, then a capacitor of suitable value on the 5V rail would still power the board as its voltage drops down to 3V3 plus LDO dropout voltage.

Same if you have an old school transformer-rectifier-cap supply. Make sure you start the write when the supply smoothing cap is at its max voltage.

If your board is powered from a wall wart, well these would have a high voltage capacitor carrying mains voltage, which should be able to power your board for at least a couple tens of milliseconds, which should be enough. In this case, you could use a simple detector on the mains voltage, and start the write when the mains voltage is above a certain threshold. Even if you lose mains voltage, the HV cap will have enough stored energy to finish the write if it has enough µF.

  • \$\begingroup\$ I knew about that paper, however it covers a little different field (apart from MLC, those are NAND Flash). I am using NOR Flash chips (Cypress; SPI). Using a cap is a good idea though with some means of detecting the loss of the main power, maybe still considering this scenario is a bit of over-engineering on my part (I am doing software, and in it I see this case and laid out code so it should work this way if this hypothetical scenario happens, I rather wish to have some idea on how useful it might be if it really does happen). \$\endgroup\$ – Jubatian Nov 16 '17 at 13:05

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