So I'm very new to USB (using 2.0) and I'm still working my way through various application notes and the official USB spec. Currently I'm working with the ATmega8U2 as my controller. In one of the AN that I worked through AN_146 USB Hardware Design Guidelines for FTDI ICs and it showed the following schematic


Screen shot from Application Note

So my question is: what is RESET#, and does it hold the entire MCU in a "wait state" until it detects a USB connection? My main concern is the possibility The MCU will only work when a USB in connected to it, because this MCU needs to do more than just handle the USB Data logging.

Thanks for any feedback/advice. If you know of any great resources for implementing a USB Data logging application I'd appreciate some additional references/sources


Typically the RESET# signal means that when it is asserted (LOW in this case, hence the sign #), a chip IC assumes all default values, all registers are set to whatever they are meant to be, clock is not running, nothing gets executed yet. The entire process inside the IC starts when the RESET# signal rises above specified voltage threshold, typical for the I/O buffers employed in the making of this IC. In most good designs this input has a Schmitt-trigger type hystersis, so only one good positive transition will be generated internally, giving the IC a clean start.

If you need your IC running without regard if USB cable is connected or not, you should de-couple this signal from VBUS, and generate it internally, typically from some "POWER_GOOD" signal.

Having said this, it should become obvious that the RESET# should be "released" only after all power rails in the design have reached their nominal levels. In other words, the RESET# signal must be delayed relative to voltage applied to IC. If your entire design is "bus-powered" (power comes from USB cable), one simplest way to accomplish the delay is to put a capacitor across the 10k resistor, 0.1 - 1uF. This RC delay should be sufficient to start the IC cleanly. It also could be that the RESET# signal has internal delay, then it is OK to have it wired as per FTDI diagram. The details should be in corresponding datasheets.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.