0
\$\begingroup\$

I am still trying to understand what kind of errors are caused in the R2R ladder depending on the amount of resistor mismatch relative to the others. For example if you have a mismatch of 12% in the MSB of an 8 bit ADC I think you would have a gain error since the total resistance would not be equal to R and and thus the inverting amplifier would not be balanced. Also I think there would be non-monotonic behavoir and DNL errors. On the other hand I think that you would have DNL and gain error even with the slightest mismatch(such as 0.2%) in the MSB resistor but you would not have non-monotonic behavior.

On the other hand if you have an error in the lower resistors such as for example LSB(+3) in an 8 bit DAC you would have both DNL and INL errors with the slightest mismatch such as for example (0.2% mismatch) and you would only have non monothonic behavoir if the mismatch is larger than a certain amount (for example 12%).

Can somebody please verify if my assumptions are correct?

\$\endgroup\$
1
\$\begingroup\$

First thing to do is writing a function of the setup, like

$$F(R_1, R_2, R_3,...R_N)=....$$

Then you have to calculate he partial derivatives for each element and multiply with resistance tolerance value:

$$\dfrac{\partial F}{\partial R_n}\cdot R_{nTolerance} $$

Then a reliable error limit would be:

$$ E = \bigg[ \lvert \dfrac{\partial F}{\partial R_1}\cdot R_{1Tolerance} \rvert + \lvert \dfrac{\partial F}{\partial R_2}\cdot R_{2Tolerance} \rvert+\lvert \dfrac{\partial F}{\partial R_3}\cdot R_{3Tolerance} \rvert +....+ \lvert \dfrac{\partial F}{\partial R_N}\cdot R_{NTolerance} \rvert\bigg] $$

\$\endgroup\$
2
  • \$\begingroup\$ But how you would know what kind of error you have \$\endgroup\$ – suyol854 Nov 19 '17 at 16:44
  • \$\begingroup\$ @user7075815 The same type of the function: volts, increments, ... \$\endgroup\$ – Marko Buršič Nov 19 '17 at 22:31
0
\$\begingroup\$

So you have a R-2R-4R-8R-16R.... DAC, and the MSB R is either 12% low or 12% high.

If 12% low in value, the current will be 12% high. Now continue your reasoning about INL and DNL. I like how you are approaching this. Now take the next step.

Perhaps draw a sketch of the output current, and draw the resultant code-errors as the Successive Approximation algorithm proceeds.

\$\endgroup\$
1
  • 1
    \$\begingroup\$ It is an R-2R ladder not a weighted resistor DAC, all the resistors are R and 2R \$\endgroup\$ – suyol854 Nov 20 '17 at 8:12

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.