# Voltage Drop Across Capacitor Driven with Square Wave

I was having a discussion with a colleague. Imagine a circuit with ideal components. The circuit is a capacitor divider (1uF and 1pF capacitors) with the midpoint being pulled down to GND by a 1Meg resistor. We drive the circuit with an ideal 1kHz 1V square wave. What is the maximum voltage drop across C1?

My colleague argued that at t=0, the capacitor C1 will see the entire 1V drop across it, since the midpoint is weakly biased to GND by the resistor.

I argued that the largest voltage drop the capacitor will ever see will be equal to the divider across Z1/(Z1 + Z2). Where Z1 = C1 and Z2 = C2||R1. The value will be almost 0V since Z1 << Z2. The R1 bias resistor is not able to effectively hold the V_mid node at GND, current will mostly flow through C2 (since its resistance is so low at 1Khz).

Who is right? I tired simulating the circuit but it was not enough to convince my friend. Can someone provide a more rigorous physics explanation of what happens at t=0? • Basically you are right, but I have no interest in a proxy argument with your friend. Particularly since infinite current is required to apply a voltage square wave across a capacitor. – mkeith Nov 20 '17 at 7:44
• This is just 2 EEs thinking through things at lunch. Not a real argument! Even if we assume a finite current source and an ESR on the capacitors this is true (trying to avoid inductance and resonance phenomena). But what is the explanation for why the V_mid node is not a true ground? Does current need to flow in a loop before the voltages can be established? – Gonzik007 Nov 20 '17 at 7:54
• If your colleague doesn't understand a simulation, I doubt that a 'few guys off the internet' will convince him. How about make it a 1000v square wave, and ask him to hold the ends of C2, one in each hand. – Neil_UK Nov 20 '17 at 7:57
• Apply a current source instead of a voltage source. Maybe you can work out the voltage across the capacitors analytically after that. – mkeith Nov 20 '17 at 8:47