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It's my first time using Altium Designer Software and I have encountered this "problem". With some pins I can route from the capacitor directly to the Gate Driver but with other ones I can't and the only way i found is routing from the pin to the component. Doing it this way this small green points appear. I would like to know what does it mean and why it happens. With the second pin from the left side in the bottom it also happens, but not with the first one.

enter image description here

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    \$\begingroup\$ Green "X"s are telling you that you are violating a constraint. You should be able to hover over the features in violation and be shown a summary of the constraints being violated. You can also run DRC to get a report. Here's a handy link. \$\endgroup\$ – uint128_t Nov 20 '17 at 15:57
  • \$\begingroup\$ I'm not seeing any nets labeled on the IC. Are you sure you have it linked properly to the schematic component, and don't have it rotated wrong? \$\endgroup\$ – DerStrom8 Nov 20 '17 at 15:58
  • \$\begingroup\$ @DerStrom8 Yes the link is correct, the name doesn't appear because it's not zoomed enough. \$\endgroup\$ – PJC Nov 20 '17 at 16:54
  • \$\begingroup\$ Ok. Then do as uint128_t suggested and hover over one of the sections with the green "X"s and look in the HUD. It'll usually show you what the error is \$\endgroup\$ – DerStrom8 Nov 20 '17 at 17:04
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It looks like you're violating a clearance error from the pads to the thermal pad. Also, your vias look like they are too big. You'll want to keep them small enough so that solder doesn't flow through the board when it is reflowed. 10 mil ID would be the biggest I would go for an in-pad via that isn't filled.

You can get around your routing constraint by changing your routing mode. While running interactive route, I believe Shift-R cycles through the different modes. Also, if you start the route from the pad instead of the incoming trace, it will probably hop into the "Ignore Obstacles" mode until you route out of the pad, then go back to whatever mode it was in.

You'll need to look at your board level clearance rules under Design / Rules...

Once there, you can find clearance rules under Electrical / Clearance. You can find which rule you're violating by following uint128_t's advice above.

Good luck!

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  • \$\begingroup\$ Yeah dad nice answer. \$\endgroup\$ – FantaC Feb 20 '18 at 21:10
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If you hover the mouse over the error (with the green "X") Altium will display the list of violations in the small box that also displays your cursor coordinates (make sure said box is enabled and displayed).

Most likely you will get:

  • Clearance between pads (fix: adjust the rule according to your PCB fab's clearance value)
  • Clearance between pads and thermal pad (fix: make thermal pad smaller)
  • Via annular ring too small (fix: make a smaller hole or a larger via, it needs enough copper around the hole to make sure the drill actually ends up inside the copper circle considering tolerances etc)
  • Hole to hole (you can't drill two holes too close to each other or the PCB material will just break)

So first make sure your rules correspond to what your PCB fab requires, and then touch up your thermal pad and vias...

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