How does the Pre-charge and Equalizing circuit shown in the below figure work?

Question

(from precharge circuit)

Could you please explain the operation of the above circuit regarding how the transistors Q8 and Q9 are responsible for charging the Bit Lines with VDD/2 while Q7 equalizes the voltage between them ?

Answer 1

Before every read/write operation, the Bit Lines must be pre-charged and equalized. This is done to assure that small voltages can be easily detected by the Sense Amplifier. The transistors Q8 and Q9 are responsible for charging the Bit Lines with VDD/2 while Q7 equalizes the voltage between them. The Pre-charge circuit is activated through the precharge input (φP).

Q7/8/9 act like voltage controlled switches (with resistance). When φP is active the FETs are turned on. Q8 connects ~B to Vdd/2, Q9 connects B to Vdd/2, and Q7 connects ~B to B. So effectively you have this:-

^{simulate this circuit – Schematic created using CircuitLab}

The bus capacitances charge up (or down) to Vdd/2 through the Drain-Source resistance of Q8 and Q9, while current can flow in either direction through Q7 to equalize the voltages.

Answer 2

^{simulate this circuit – Schematic created using CircuitLab}

Assume C1,C2 are the bit bus lines that may have some unknown voltage on each before the 3 switches are gated ON. The result is a rapid RC time constant towards Vdd/2 on each line.

Q7 is slightly bigger with lower RdsOn so they are equalized fast but not necessarily at Vdd/2, while Q8,Q9 are normalized to be equalize RdsOn for Nch, Pch to arrive at Vdd/2 with assistance from Q7. Values are not exact.