# Electromagnetic Interference in Converter

I have a question about this line of a power electronics book: "Another significant drawback of the switched-mode operation (in converter topologies) is the EMI (Electromagnetic Interference) produced due to large di/dt and dv/dt caused by a switched-mode operation."

How can the derivation of the current and voltage affect the EMI production?

• Do you know any antenna theory? or even how an antenna works? This is same as EMI from loops and stray capacitance. Commented Nov 22, 2017 at 20:14
• No I don't know much about antenna theory. Could you explain or give some usefull keywords related to the subject of question? Commented Nov 23, 2017 at 17:41

How can the derivation of the current and voltage affect the EMI production?

• dv/dt

If a node of your circuit couples into another through capacitance, the amount of current injected via the parasitic capacitance will be proportional to dv/dt. This is simply due to the current in a capacitor being $C dv/dt$. If the impedance of the victim node is known, then a voltage will develop on it proportional to this impedance and current through the parasitic cap.

=> If a node has high di/dt it should not have a large area which forms large parasitic capacitances with everything nearby.

This is why it would be a very bad idea to have, say, the heatsink of your power MOSFET connected to the drain without insulation. A large heatsink with large voltage swings and high dv/dt will couple into anything nearby through parasitic capacitance. Likewise, nearby traces carrying fast signals will crosstalk depending on edges dv/dt.

• di/dt

A current loop creates a magnetic flux which is proportional to current. This flux will induce a voltage in nearby loops (pcb traces, etc). This voltage is proportional to the derivative of the flux (and thus the derivative of the current). Thus the amount of magnetic coupling is proportional to di/dt in the source loop.

=> if a loop has high di/dt then it should be as tight as possible, since the radiated flux (and thus EMI) is proportional to loop area.

Also, remember some features of your circuit are loop antennas, slot antennas, dipole antennas, etc. These will get much better at transmitting noise at certain frequencies, depending on how they resonate, their dimensions versus wavelength of signal, etc. High di/dt or dv/dt means your signal will contain many more high frequency harmonics, thus it will have a higher likelihood of exciting some resonance somewhere and turning some innocent looking part of your circuit into a tuned antenna.

I think what you mean to ask is how the DERIVATIVE (i.e. dv/dt and di/dt) of the current and voltage can affect EMI.

The derivative of those quantities represents (of course) rate of change. A high rate of change implies high frequencies- Fast edges imply lots of harmonics.

A switching supply will try to minimize the time that the power switch is in the linear region by switching very quickly. It may also try to minimize the size of the magnetics by switching at a high frequency. 100kHz to several MHz is not uncommon, with rise and fall times in the nanoseconds. The power switching waveforms like the switch node voltage and inductor current (e.g.) are then capable of radiated and conducted EMI.

That's because high frequency signals tend to radiate more easily, and are more easily conducted e.g. capacitively to other circuits.

For any given peak current, the "interference-capable" (I made up that term) frequency content of the frequency spectrum of the waveform is directly proportional to the rate-of-change of the waveform. A high di/dt means a very rapid increase/decrease in the current, and hence the field aurrounding the couductor. Fourier calculus relates this to bandwidth and harmonic content.

A line powered supply has a fundamental freq of 50-60 Hz, with the harmonics caused by non-sinusoudal capacitor charging current extending into a few kHz. All of that is below the 10 kHz lower limit of, for example, FCC EMI and RFI rules. A 100 kHz switcher has much more radiated and conducted noise because none of the currents are sines or distorted sines; they are square waves, pulses, and inductive spikes. These waveforms have much more harmonic energy relative to the fundamental, and all of that energy is in spectrum areas occupied by other things. It is relatively easy for a 100 kHz switcher to fail FCC or MIL-STD-461 testing at 2 MHz and above.

Look into Fourier Transform web pages to see the relationship between waveform shape and harmonic content.

Here is example of how the SlewRate, of HFI magnetic field and of EFI electric field, defines the level of interferer. In this simulation, we have

(1) HFI-generating SwitchReg, 10mm from signal line

(2) EFI-generating microcontroller clock,1mm from signal line

If Gargoyles button is OFF, the SNR (top right) is 99dN. If Gargoyles (the 4 interferers, of which only 2 HFI and EFI are turned on) are on, SNR is 27dB. The victim trace is 100mm long and 1mm above a plane, and 0.95mm average width. The default trace length is 10mm; I used the Wiring Wizard (enabled for local editing) to increase length to 100mm (4 inches).

That 100mm * 1mm is the loop area vulnerable to magnetically induced interference.

That 100mm * 0.95mm is the plate area vulnerable to electrically induced interference.

Here is the simulation:

and here is part of the "Analysis Details" (far right) text report

How is this done? Click the text "HFI" and examine the table for Magnetic aggressors. Similarly, click the text "EFI" and examine the table for Electric aggressors. In each table, a column "SlewRate" provides that key parameter for the injected voltage (for magnetic) and charge (for electric).

Here is the HFI table

and here is the HFI math used in Signal Chain Explorer

Vinduce = [2e-7 * Area/Distance] * dI/dT

In this Signal Chain, the ADC has input R and sampling C, thus is a low pass filter, rolling off response. Also the Sensor has Rout of 1,000 ohms. System F3dB is 9MHz, low enough to affect both the HFI and EFI responses.

The Spectral Density can be measured with the log amplitude display of a Spectrum analyzer. That is the amplitude part of a Fourier Analysis which also includes phase.

Below is a simulation just using a 1 kHz hand drawn "glitch". The bandwidth (BW) has many harmonics of the pulse repetition rate here at 1kHz. They only drop in amplitude from a limited rise time and then rapidly there is a null where a sine wave that fits inside pulse width. Because I drew a pulse with about 2.5% duty cycle, the amplitude goes thru a null near 1/(2.5%) or the 40th harmonic.

The rise time, Tr is measured from 10 to 90% here. This can result from the slew rate Vc= I C dV/dt of current pulses charging a capacitor or I = L dI / dt or the voltage spikes from releasing an inductor current rapidly.

$f_{-3dB ~~BW}=0.35/T_r$

Now you can understand how slew rate affects bandwidth.

Amplitude is like the brightness of a light which drops quickly if your eye is close to the source then more gradually according the area of a sphere with radius or the inverse square relationship. Logarithmic display compresses the signal for convenience when we want to measure Signal to Noise Ratio in dB.

The effectiveness to radiating noise or suppressing it depends on the wire or surface area , the dimensions in length or area and the proximity with inverse square loss.

Because stray capacitance is small, it's impedance lowers with rising frequencies, so it is these which attenuate less into a some nearby signal wire.