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I've built an IR remote and for integration purpose, I need to bring the led about 1m (3 feet) from the microcontroler. Led Freq is 455KHz. Temperature considered as room temperature.

I choose to move the mos and the led at the end of the wire. Here's the schematic:

enter image description here

It's not very surprising that supply and signal are "a bit" distored when arriving to the led and the mos (yellow = signal, orange = power) :

enter image description here

I suspect that I need some bypassing. I'm thinking about adding a capacitor beetween gnd and VCC. I plan to choose a capacitor with a good response around 18 MHz (for the ripple in orange after the 7th division on the graph).

My questions are:

  • is it the good way to go?
  • If not, what should I do? Starting from the graph, is there a way to calculate the capacitance value?
  • forums and docs talk about low ESL and low ESR but what is low? 1? 1mR? 1µR? Same question for inductance?
  • Should I add something on signal too?
  • Any other advice?

Thanks for your help.

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  • \$\begingroup\$ I can understand that it is difficult to twist the wires in the schematic because that would make it difficult for us to see what wire goes where, but have you twisted the physical cables in real life? - On top of twisting the wires, I'd also use a decoupling capacitor. \$\endgroup\$ – Harry Svensson Nov 25 '17 at 13:32
  • \$\begingroup\$ Lol about schematic... No, I didn't twist, IRL, I have 5 conductors (GND, VDD, led drive, and 2 buttons). it's a flat wire. Something like this: link \$\endgroup\$ – Julien Nov 25 '17 at 13:44
  • \$\begingroup\$ I answered an identical question some time ago but can't find it at the moment. In any such situation, I aim for 5-10 % allowable overshoot, depending on your overall design margin. Calculate Ipk^2*Lcable=E. Choose C large enough to satisfy E=(0.05Uin)^2/C. Straight RC snubbers and MOV may be acceptable too. \$\endgroup\$ – winny Nov 25 '17 at 15:30
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The long wire in the FET gate will have inductance, this can make the FET oscillate. Fix is to add a resistor like 100 ohms in the gate.

Now, for your decoupling, you will need to take into account the inductance of your wire. Since there are decoupling caps on the board +5V supply, if you add a cap at the end of the wire between +5 and GND then you will form a C-L-C circuit which will resonate. The 18MHz resonance you are observing is likely an interaction between wire inductance and parasitic capacitance of diode and FET.

Thus, calculate the inductance of your cable. Or just use 50-100nH/m if your wires are twisted. Let's say 100nH to be safe.

I will suppose the +5V is properly decoupled, for example a 10µF capacitor with negligible ESR (MLCC).

Thus we want a cap at the other end of the wire which gives a nice damping factor (no resonance).

\$ damping factor = \frac{R}{2} \sqrt{\frac{C}{L}} >= 1\$

Thus

\$ R >= 2 \sqrt{\frac{L}{C}}\$

Let's put another 10µF MLCC there. It's in series with the 10µF cap on your board, so you get 5µF total capacitance. Note that even if you put 1000µF at the end of the wire, the cap value to use for this calculation is both in series, so in this case it will never be more than 10µF since that's what I supposed was on your board...

Anyway, in this case we get R > 0.2 ohms.

Thus, put a 0R22 in series with the wire or the cap, and a 10µF cap, right at the end of the wires. Adjust to taste depending on how much your MLCC loses capacitance under voltage.

Or just grab an aluminium cap, the 105°C low-Z type of a few hundred µF, these usually have ESR in the 0.1-0.2 ohms, it'll work fine.

Note that if you use a ribbon cable, make GND and VCC next to each other, to reduce inductance and emissions. Best would be buttons - GND - VCC - LED drive to avoid crosstalk from LED drive into the button wires.

EDIT for Jim:

Looking at the trace, MOSFET gate drive goes up, then the FET conducts and the LED gets some current, this happens on the second horizontal division on screen. Due to the wire inductance, supply voltage at the end of the wire drops by a lot then slowly rises as current through the inductance ramps up.

BTW, shouldn't there be a resistor in series with the LED? That would probably solve the problem...

It is when OP attemps to turn the LED OFF than the fun happens. The FET turns off and becomes a capacitor, but the wire inductance is loaded up with the LED current. The LED is still ON, it's a diode, it won't turn off until it has exhausted its recovery charge, which can take a while. So we have a LC tank with the wire inductance and the FET capacitance. To get 18MHz oscillations with 50-100nH the FET capacitance should be in the nF range, which is realistic.

Thus voltage bounces all over the place as the LC rings... at 5V/div we have a 20V spike. Yikes!

Putting a local cap would reduce the inductance in the loop. The resistor I talked about is to avoid LC resonance between the caps on the main board and the cap at the end of the wire, which is something you want to avoid. It will not necessarily prevent the ringing at turn-off, although it should be much reduced, due to the lower inductance from the cap being placed close to the LED.

For this the solution is to switch slower by adding a resistor in the gate. There is no point in switching the FET in 10ns for a 450kHz signal...

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  • \$\begingroup\$ Looking at your second equation, the capacitance term C is in the radical's denominator; therefore, reducing C's value requires a larger damping resistance value R to achieve the desired damping factor. So why add the 10µF cap at the end of the wire? Why not simply calculate a value for damping factor resistance R_DF for wire resistance R_WIRE, wire inductance L_WIRE, and power supply decoupling cap C_PS, without the additional cap? R_DF + R_WIRE >= 2*SQRT(L_WIRE/C_PS) \$\endgroup\$ – Jim Fischer Nov 25 '17 at 19:49
  • \$\begingroup\$ Thanks. "BTW, shouldn't there be a resistor in series with the LED? That would probably solve the problem..." Agreed; it would help dampen the ringing when Q1 shuts off (not to mention limit the current through the LED when Q1 is on). Adding resistance to the gate lead makes sense to me. That resistance should help dampen the "sloshing" energy that's flowing back-and-forth through the gate-drain capacitance and along the wire labeled "to µcontroller" (with its inductance) when Q1 shuts off. \$\endgroup\$ – Jim Fischer Nov 25 '17 at 20:23
  • \$\begingroup\$ Yes, switching slower both reduces the amount of HF energy available to excite the ringing, and turns the FET into a temporary damping resistor during switching. \$\endgroup\$ – peufeu Nov 25 '17 at 20:43
  • \$\begingroup\$ Very interersting. Before I ask you some more precisions, can you confirm that this is the schematic you are talking about? You're talking about capacitors in series. I can't see how C3 can be in series with C2. \$\endgroup\$ – Julien Nov 26 '17 at 13:52
  • \$\begingroup\$ Yes this is good, but stick R9 close to the FET gate to avoid risk of oscillation. C3 and C2 are in series from the perspective of the series LC circuit C2-wire-C3-wire-C2 \$\endgroup\$ – peufeu Nov 26 '17 at 14:15

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