How do I calculate the ADC Sampling Frequency if the (12 bit) ADC Clock of the MCU is 36MHz with a prescalar of 2?

I use a SysTick Event Handler to sample every 0.25 ms for example.

  • \$\begingroup\$ .25ms = 4 times every millisecond times 1000 milliseconds per second, is 4000 samples per second, or 4khz. \$\endgroup\$ – Ron Beyer Nov 25 '17 at 15:26
  • \$\begingroup\$ Thanks, Ron, I thought the same. But I am confused as we completely ignore the clock speed of ADC and the resolution. \$\endgroup\$ – Student91 Nov 25 '17 at 16:51
  • \$\begingroup\$ Because you are using a polling method, and assuming that the conversion can happen in .25ms. If you want to know the maximum frequency of the ADC then you take into account the frequency of the clocks, 36mhz / 2 = 18mhz. It takes about 14 clocks to do a conversion, so your maximum ADC frequency is about 18000000 / 14 = 1.285714msps. \$\endgroup\$ – Ron Beyer Nov 25 '17 at 16:58
  • \$\begingroup\$ Requirements: Bandwidth of my signal of interest = 500 Hz Nyquist Sampling freq >= 1 KHz So, We need a conversion time <= 1 ms Configurations: ADC Clock from the APB2 Bus = 36 MHz Prescalar = 2 Resultant ADC Clock = 18 MHz Sampling Time = 3 cycles So, frequency of 'Sampling and Hold' = 6 MHz which gives us the Conversion Time = 0.167 µs This, of course, satisfies the requirement. Am I doing it in the right way? And, is it bad to use the Polling method which assumes that the conversion happens in 0.25ms? Many thanks! \$\endgroup\$ – Student91 Nov 25 '17 at 17:38
  • \$\begingroup\$ You should be ok timing wise, but you may want to average some samples to smooth out jitter. Also make sure that you verify that the conversion is complete before reading the register. \$\endgroup\$ – Ron Beyer Nov 25 '17 at 18:14

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