Design a counter: 12-10-8-6-4-2-0-1-3-5-7-9-11 using D Flip Flop.
My first approach is designing a 8 - 6 - 4 - 2 - 0 - 1 - 3 - 5 - 7 - 9 - 8 - 6 ... counter and display them on 7segment LED.
After writing down the binary code of these numbers above, I realize that they seem obeying a rule
1 0 0 0 (8)
0 1 1 0 (6)
0 1 0 0 (4)
0 0 1 0 (2)
0 0 0 0 (0)
0 0 0 1 (1)
0 0 1 1 (3)
0 1 0 1 (5)
0 1 1 1 (7)
1 0 0 1 (9)
It can be seeen that the LSB of the even numbers are always 0, while they're always 1 for the odd numbers. As for 3 left bits, they are symmetrical. So my idea for this problem is after counting from 8 downto 0, the LSB would change from 0 to 1, and start counting up (using 3 or 4 D-Flip-Flop and logic gates). But after writing down Next State Table, I face with the way to force my starting number to be 8.
Present State ---- Next State
0 0 0 0 ------------ 1 0 0 0 (next state is 8 if starting number is 0)
1 0 0 0 ------------ 0 1 1 0 (display 8, next state is 6)
0 1 1 0 ------------ 0 1 0 0 (display 6, next state is 4)
0 1 0 0 ------------ 0 0 1 0 (display 4, next state is 2)
0 0 1 0 ------------ 0 0 0 0 (display 2, next state is 0)
0 0 0 0 ------------ 0 0 0 1 (display 0, change LSB into 1, and activate counting up)
The problem here is that the state 0 0 0 0 is used twice (once for forcing starting number to be 8 and once for change LSB into 1) and I think my counter would get confused. So I wonder there are any ways to implement this kinda counter?
Thanks in advance for any of your answers.
My circuit works, bases on @Trevor's circuit Thanks all for your amazing ideas.