# Divide by N clock/frequency

I need to create a clock divider which has 2 inputs: n(12 bit) , clock. For every even N it needs to divide the clock frequency by that number. (2,4,6,8 etc). However I have run into some problems. First of all I created the following divider. However if I need to do this for 12 bits its going to be too much work. It feels like so much work that there has to be a better way. Also this doesn't cover a lot of values. I do have a question about this design which is: Are you supposed to connect ~Q to the clock input of the next flip flop or should I have connected Q to the clock input?

I thought about a better design and came up with the following. I will give some explanation: I used a counter which counts untill it equals a number X in the comparator. Then the Comparator sends a 1 to the flip flop and the flip flop outputs this. But here I have the following problems: - Doesn't auto reset. - It turns on the flipflop after lets say 4 ticks, but it doesn't switch it off.

The auto reset should be easy to fix. But the fact that my flipflop does not turn off after x ticks is less great. My question is am I on the right course or do I need a new approach? If my second design has the right idea please give me some advice on how to get it working.

• A register to store n. A counter with same number of bits. A digital comparator whose equal output goes to the clock of a T flip-flop. – mkeith Nov 28 '17 at 3:37

I'd use a down counter that you can preset with a value.

You then have a latch to store N/2.

Each time the counter reaches zero you toggle a D-type output latch and reload the counter.

The output from the D-Type will then be 50% mark-space clock at your desired frequency. simulate this circuit – Schematic created using CircuitLab

BTW: This is basically how every timer works in common micros.

• Okey so if I understand correctly. I will use the counter in a reverse way the same way I did to count up. So first I count up the latch is activated. And then it will deactivate after counting down to 0? Also thanks for your reply – goml Nov 28 '17 at 12:08
• @gomi. Normally you would make it reload the counter when the counter wraps round to -1. that is, use the most significant bit of the counter to reload the counter and toggle the D-Type. If it is synchronous you would need to detect the zero state. – Trevor_G Nov 28 '17 at 12:12