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In the context of parasitic capacitances in ASIC design. Imagine a net going through Node1. My parasitic extraction gives capacitance C1 to ground and C2 to the power net. What is the total/effective capacitance of the net?

Note, this is not a homework question, and I am not a student.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ For equivalent capacitance replace voltage sources with equivalent R=0, now you can see they are // \$\endgroup\$ – Tony Stewart EE75 Nov 30 '17 at 20:43
  • \$\begingroup\$ Capacitance is not a property of a point. \$\endgroup\$ – Eugene Sh. Nov 30 '17 at 20:59
  • \$\begingroup\$ Noted, edited to clarify the question. \$\endgroup\$ – user61034 Nov 30 '17 at 21:06
  • \$\begingroup\$ Node capacitance depends on Area/gap ratio between all conductors Vdd, Node1 and 0V as well as crosstalk to nearby Nodes and endpoint switched capacitance of CMOS inputs. But usually Vdd and Gnd are coupled by a much larger C and 0V Gnd is the reference point unless otherwise noted. \$\endgroup\$ – Tony Stewart EE75 Nov 30 '17 at 22:06
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If you assume V1 to be rigid, changing the voltage of NODE1 needs both capacitors to be charged or discharged as many volts. Thus the effective parasitic capacitance of NODE1 is C1+C2.

More formal proof needs superposition theorem. In AC component calculations DC voltage sources must be set = 0V. Thus C1 and C2 are in parallel, total C = C1+C2.

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