# CMOS LOGIC GATE DIAGRAM

I have my solution for the logic gate diagram to implement the function f=(a+(b*(c+d)))' Would anyone be able to confirm if this is legitimate?

• Ask "How should I present a question meant for humans?". – Harry Svensson Dec 5 '17 at 0:46

## 1 Answer

Your desired function is $$f=a+b\cdot(c+d),$$ where I took the liberty of removing some redundant parenthesis. Keep in mind that with CMOS logic, we want to drive the signal high (connect to the supply voltage +V) if the result is to be 1 (high) and we want to drive it the signal low (connect it to ground) if the result is to be 0 (low). NMOS-transistors are conducting ("on") if the signal is high, but can only be used to connect it to ground.

You drive the output to ground if $$\text{drive_to_ground} = a + b \cdot (c + d) = f,$$ which is inverted from what you wanted to achieve.

PMOS-transistors can be used to connect to the supply voltage, but it's inputs are inverted. Your network has:

$$\text{drive_to_supply} = \bar a\cdot (\bar b + \bar c \cdot \bar d) = \overline{\overline{\bar a\cdot (\bar b + \bar c \cdot \bar d)}} = \overline{a+b\cdot(c+d)}=\bar f,$$ which is also inverted.

You can either append an inverter to your output, or you can change your wiring so that your result is not inverted.

• The function I actually wanted is what you wrote above, but complemented? So thats why it seems to be inverted? – jay rivera Dec 5 '17 at 3:20
• In short; yes, I believe so! If you start with the bottom part (NMOS), then invert your function first (since you are basically solving f = 0 (low).) – Pål-Kristian Engstad Dec 5 '17 at 3:22