I'm trying to build a low frequency oscillator (think about 0.01Hz - 5Hz) using a TL072 as an astable multivibrator. Here's the circuit in LTspice:

enter image description here

And here's the simulated output:

enter image description here

Where does the 2.8s initial delay come from? It appeared once I raised R to 1M to decrease the frequency to suit my range. Also, where would one put a potentiometer for frequency adjustment? I also suspected using an electrolytic capacitor in this configuration would damage it as it's repetitively getting a negative voltage, so I limited C1 to 100n.

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    \$\begingroup\$ What is needed for C1 to charge/discharge? A current! Where does that current need to come from? Through R from the output of U1. But U1's output is 0 (zero) until about 2.8 s. So you have a chicken-egg problem. The output switching does not start until the C1 gets a charge but C1 doesn't get a charge until the output is switching. You're "lucky" that there is some offset somewhere so C1 does manage to charge be it very slowly. To solve this, give C1 a pre-charged condition. Use a nodeset or initial condition to start with 100 mV DC across C1. \$\endgroup\$ Dec 7 '17 at 9:22
  • \$\begingroup\$ You can use a electrolytic cap for C1 if you use a non-symmetric power supply and bias the bottom side of R2 not at ground but at Vcc/2. Or you make C1 bipolar by using two electrolytic caps in anti-series (2 caps in series, connect - poles, use both + poles as C1). \$\endgroup\$ Dec 7 '17 at 9:25
  • \$\begingroup\$ @Bimpelrekkie I'm using +/-12V, this is for a modular synthesizer which works on +/-12V with +/-5V output signals \$\endgroup\$
    – Qrchack
    Dec 7 '17 at 9:26
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    \$\begingroup\$ Oh, there's a third solution for a polarized cap, instead of connecting the bottom of C1 to ground, connect it to -12 V, then the voltage will always be positive and you can use an electrolytic cap. \$\endgroup\$ Dec 7 '17 at 9:35
  • \$\begingroup\$ Nice! I've played around some more and got this so far, 9Hz so close but not quite there yet: i.imgur.com/ojtZFJn.png \$\endgroup\$
    – Qrchack
    Dec 7 '17 at 9:36

Model 1 mV of offset voltage and this won't happen. The simulated op-amp is starting up in a precariously balanced-on-a-point condition that is totally unrealistic.

To adjust the frequency, change R to a pot (better with a resistor in series). You can use a film capacitor. Ceramic caps are another possibility, but suffer from voltage coefficient (this circuit does not produce linear sawtooth anyway).

Note that period, not frequency, is linear in R as well.

For shaping to sine waves it might be better to use an op-amp + comparator oscillator, which will give you nice linear triangle waves, and can be adapted into a VCO which is linear frequency for input voltage by switching the integrator to +/- gain with comparator state.

  • \$\begingroup\$ To be technical, the astable multivibrator shown has a metastable condition when both the capacitor voltage and the output voltage are zero. This assumes zero bias current, which is actually pretty close to reality, since the TL072 has typical values of 5 pA. \$\endgroup\$ Dec 7 '17 at 15:20
  • \$\begingroup\$ This is the design I'm trying to understand: electro-music.com/forum/phpbb-files/simple_osc2_187.jpg \$\endgroup\$
    – Qrchack
    Dec 7 '17 at 16:59
  • \$\begingroup\$ Basically I'm working my way from the basics to fully understand what's going on \$\endgroup\$
    – Qrchack
    Dec 7 '17 at 17:00
  • \$\begingroup\$ The schematic you linked is the op-amp integrator + comparator that I mention above, with two paths to adjust the rise/fall of the triangle wave. \$\endgroup\$ Dec 8 '17 at 0:25
  • \$\begingroup\$ @WhatRoughBeast Typical gain of the TL072 is 200,000 so even a microvolt of offset would cause the positive feedback to kick in and the op-amp to slam to one side or the other. Even if the offset by one chance in 6000 the offset started off at less than 1uV, a change in die temperature of 0.05 degrees would take care of that, even without noise. It's totally a mathematical issue. \$\endgroup\$ Dec 8 '17 at 0:40

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