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I have a DAC connected to an FPGA, which I cannot get to work. The FPGA, in a loop, sends in the maximum value to the data pins and incrementally goes down to 0.

I have checked with a scope that the data pins are changing as expected, and I have checked that the clock is OK. Nevertheless, the output analogue signals IOUTA and IOUTB stay constant (around 1V).

The DAC can be configured through an SPI channel, but the default configuration should work out of the box. What could I be doing wrong for my DAC to stay constant despite the data pins changing?

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  • \$\begingroup\$ Have you checked that SELECT is high and therefore routing to IOUT? Just something to check that you didn't mention. \$\endgroup\$ – embedded.kyle Jun 22 '12 at 14:45
  • \$\begingroup\$ Aha! That was indeed wrong. Recompiling, and waiting for results. Thanks. \$\endgroup\$ – Randomblue Jun 22 '12 at 15:03
  • \$\begingroup\$ @embedded.kyle: Nope, didn't work... \$\endgroup\$ – Randomblue Jun 22 '12 at 15:10
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What do you have connected to the outputs? They're current outputs, so 1 V as output can't be right. Connecting a load resistor to ground should convert the output current into a voltage.

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  • \$\begingroup\$ Each differential pair wire is connected a pull-down resistor, and the differential pairs are connected to EMI filters. \$\endgroup\$ – Randomblue Jun 22 '12 at 14:38
  • \$\begingroup\$ @RandomBlue - FS output current is typically 10 mA, if your resistor values are too high the signal may be clipping. \$\endgroup\$ – stevenvh Jun 22 '12 at 14:54
  • \$\begingroup\$ @Randomblue - can you post the part of the schematic around the DAC? \$\endgroup\$ – stevenvh Jun 22 '12 at 15:01

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