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I am learning processor basics. I have this doubt.

If I have a processor with 9 one-byte instructions and one 2-bytes instruction in its instruction set architecture, should n't the instruction register of the processor be 16 bits instead of 8-bits ? Say for example:

2000  MOV A,B
2001  MVI C, 20h  --- 2 byte instruction

In my book it says PC points to address 2003 after 2001. So it means, when PC was pointing to 2001, both the 8-bit immediate data and the 8-bit opcode were fetched into the instruction register in one go right ? Or is it fetched in two cycles ? Also I would like to know what is the significance of data and instruction caches in a processor. Is it neccesary in a processor ?

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    \$\begingroup\$ The second one is is also 8bit instruction with arguments. Arguments are loaded into other registers. \$\endgroup\$ – Gregory Kornblum Dec 9 '17 at 18:22
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    \$\begingroup\$ Your code examples look like 8080, 8085, Z80 etc. instructions. All these are cache-less processors, with 8-bit data bus. So mov a,b requires one bus-transaction, while mvi c,20h requires two sequential bus transactions. In these simple processors, PC gets incremented by 1 for every bus transaction (except for jmp, call, return, reset type instructions, where PC's contents are over-written). \$\endgroup\$ – glen_geek Dec 9 '17 at 20:01
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The instruction register generally holds only the bits that constitute the "opcode" part of an instruction (including any bits that affect addressing modes) for the duration of the execution of the instruction, so that the instruction decoding logic has access to it.

Any bytes in the instruction that are only operands are not generally held in the instruction register.

If the bus width of the processor is only 8 bits, then the two bytes of the instruction are fetched in separate cycles. The second cycle is executed after the instruction decode logic has decided that there is a second byte as a result of examining the opcode in the first byte.

And no, caches are not necessary to the operation of a processor, but they help eliminate bottlenecks when the processor is faster than the main memory.

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    \$\begingroup\$ Hmm here is where my doubt really resides. Two fetch means PC has to point to 2002 after 2001 right ? If it points to 2003 after 2001 , how can the data on 2002 be fetched in the second cycle, from the program memory ? \$\endgroup\$ – Meenie Leis Dec 9 '17 at 18:20
  • \$\begingroup\$ That's an implementation detail. It's probable that during the execution of the instruction, the PC temporarily points to 2002 in order to fetch the second byte. But after the instruction is finished, the PC points to 2003. Nobody ever said that it goes from 2001 to 2003 in a single step. \$\endgroup\$ – Dave Tweed♦ Dec 9 '17 at 18:33
  • \$\begingroup\$ It was actually a question on PC without specifying any implementatiom details. I just read the answer as PC will point to 2003 and the explanation as - "PC points to the next instruction to be fetched from the memory ". That caused all these confusion :-) \$\endgroup\$ – Meenie Leis Dec 9 '17 at 18:38

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