Explanation needed on using 2 transistors as a switch

Question

I'm suggested to use following design to drive a load with a micro-controller. I would like to know that why is it needed to use 2 transistors (n-ch and p-ch) to act as a switch and not only one?

I searched over Google and youtube, and most pages were using one transistor (mostly n-ch) to make a switch, like this page:

http://www.electronics-tutorials.ws/transistor/tran_7.html

Could you please explain me advantages or disadvantages of having such design (2 transistors) over one-transistor switches?

^{simulate this circuit – Schematic created using CircuitLab}

Answer 1

If the digital signal swing is the full 5 V, then you can use just the final P-channel FET.

The advantage of the two-transistor circuit is that the power voltage being switched and the digital signal power voltage don't need to be the same. The circuit you show would work with the power voltage being up to the maximum G-S voltage the second FET can handle.

Answer 2

This is a top side switch. Most of the circuits you have probably seen are bottom side switches. Top side switching adds some interesting issues that are unique to that application. As such, there are numerous reasons for the two stage switch you indicated. The two main ones are:

1. Even when the switched voltage is the same as your logic power supply voltage, the high level logic output voltage can be significantly lower than the rail. This can result in inconsistent switching of a single P-Channel MOSFET.

2. The gate of a MOSFET is basically a capacitor, and because the P-Channel MOSFET is relying on that pull-up resistor to turn it off, the size of that pull-up needs to be relatively small if you need to switch this power quickly. As such, the current you need to be able to pull down through the pull-up when the N-Channel is on can be a lot higher than your GPIO can sink.

Additional Benefits

1. The two stage control also allows you to switch a much higher voltage to the load than the logic supply. Theoretically you can switch up to the Vds maximum of the P-Channel device with a two stage driver. However, the circuit would need to be modified to limit the voltage on the gate of the P-Channel to under Vgs_max. Further, top-side switching of very high voltages is in general, problematic.

2. By using a small signal N-Channel for the first device you can significantly reduce the capacitive load on the GPIO pin. This reduces the strain on the latter and keeps your logic supply less "noisy".

Answer 3

As an add-on to @OlinLathrop’s answer, the other difference between the P-channel FET (with or without the additional N-channel FET) and the N-channel FET shown in your link is that the P-channel is a high-side switch (switches the Vcc to the load) while the N-channel is a low-side switch (switches the ground to the load).

For simple loads without additional I/Os, such as LEDs, motors, etc., the low-side switch is fine. For loads with I/Os connected out to separately powered circuits, such as other microcontrollers or sensors, it is generally preferred to keep the ground connected and use a high-side switch.