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I know from searching that it is good practice to buffer the input of an ADC input signal with say a unity gain Op-Amp, but the discussion is always based on the input being some sort of sensor that has low current/high output impedance and the buffer is used to match the sensor output with the load of the ADC.

Is a buffer still needed/recommended if the input to the ADC is a strong signal like the output of a system DC Power Supply running through a voltage divider to adjust the voltage down to a range the ADC can work with?

For example, my product has a 24VDC 3Amp switcher supply that powers the entire system, including the micro-controller. I want to to monitor the Power Supply voltage level by feeding it into the ADC of the micro. I will use a voltage divider to get the max voltage down to 3V but is it still a good idea to feed that voltage to op-amp to buffer it?

Thanks for any and all advice.


Thanks for everyone's feedback. The ADC will be part of either an STM32 M3 or NXP Coldfire microcontroller. Due to the voltage divider I will simply play it safe and buffer it.

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  • \$\begingroup\$ That depends on your voltage divider...Do you plan on using low value resistors? I'm guessing no... \$\endgroup\$ – Trevor_G Dec 11 '17 at 17:42
  • \$\begingroup\$ Re-think your question into gain and offset specs and decide what the load regulation impedance does to voltage drop on source impedance and decide for yourself. All problems are due to lack of pertinent specs. : resolution, tolerance and signal bandwidth. \$\endgroup\$ – Sunnyskyguy EE75 Dec 11 '17 at 17:44
  • \$\begingroup\$ @TonyStewart.EEsince'75 you are having one of THOSE days.. I can tell.. must be the snow. \$\endgroup\$ – Trevor_G Dec 11 '17 at 17:45
  • \$\begingroup\$ Please post the datasheet for the ADC (or the datasheet for the microcontroller, if the ADC is in the microcontroller). For an example, a typical 10-bit ADC in a PIC microcontroller works fine with a voltage divider without buffering, as long as the lower resistor in the voltage divider is 2kΩ or less. \$\endgroup\$ – Nick Alexeev Dec 11 '17 at 17:46
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    \$\begingroup\$ No trev. it's anticipation of fire as we go to LA for a wedding this week. but for fun, recall Wayne & Shuster's parody on Bonanza 70's TV show coming out of the ring of fire eating a hotdog. \$\endgroup\$ – Sunnyskyguy EE75 Dec 11 '17 at 17:47
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The buffer is used to convert the impedance from the source into a low value so the input impedance of the ADC itself does not significantly affect the voltage measured.

Since you are going to divide the voltage down to something usable by the micro via a voltage divider, and since you will want to use large resistors for that divider to limit the power losses, you end up with a high impedance source. As such you need to buffer it after the division before presenting the value to the ADC.

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    \$\begingroup\$ Thank you very much. I was wondering about that very issue regarding the voltage divider so I will play it safe and buffer it. \$\endgroup\$ – Visinet Dec 11 '17 at 18:21
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You should actually crunch the numbers and see if it's necessary or not. For example, the STM32 under conditions described here will allow a 6.4K source impedance while affecting the 12-bit ADC by less than 0.5 LSB. Under the stated conditions (re-do the calculation for your conditions) so long as your divider resistors R1 R2 are such that :

\$R_S= \frac{R_1 R_2}{R_1+R2} \le\$ 6.4K you are fine.

If you are monitoring a 24V supply you could use a divider in the 50-60K range of R1+R2 to get a ~9:1 resistor ratio and R1||R2 < 6.4K.

The current draw of that is less than 0.5mA @24V, which is less than many op-amps, and you won't get the offset error, input common mode range or saturation effects. For example, an op-amp with 3mV Vos would add 4 LSBs of error to the STM32 vs 1/2 LSB from a 6.4K source resistance.

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1.  Voltage source > feedback ratio > Source / load Z << gain error.
  e.g. 10k/1M is 1% error. 5k/10M is 0.05% gain error, 
 If using 0.1% R's then load error can be corrected with divider values.

Other considerations

2.  dV/dt ~ 1/3f(-3dB) where dV signal >> resolution error >  SNR reduction
3.  Aliasing effects if f-3dB > 1/2 sampling rate at lowest res. level > SNR reduction
4.   dV/dt signal attenuation if insufficient samples per dt sample interval
5.   thus sampling rate tends towards >3x f-3dB of input signal    
6.   depends on resolution and gain error budget >> SNR worst case feedback    
7.    and regulation error gain at GBW of loop if used for feedback.      
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The ADC part datasheet should have an input impedance spec or range, and probably a recommended maximum source output impedance. For an approximate answer, calculate the Thevenin equivalent resistance of the two-resistor divider. If the minimum input impedance of the ADC is 100 times greater, that still is a 1% error that is independent of the error caused by the resistor tolerances. Without more information about your system, I vote yes for a buffer.

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  • \$\begingroup\$ shouldn't this be the other way around? If the input impedance of the ADC is 100 times the Thevenin equivalent? \$\endgroup\$ – Big6 Dec 11 '17 at 18:01
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    \$\begingroup\$ Oops. edited the comment. \$\endgroup\$ – AnalogKid Dec 11 '17 at 19:10
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The decision strongly depends on characteristics of ADC input. It may have not only low impedance, but be non-linear and generate current pulses (for example, by internal switched capacitors). In such case the term 'input impedance' becomes nonsense, and input buffer must tolerate such 'bad' load.

So, it's a good idea to inspect datasheet data on ADC input and follow recomendations given there.

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