# Use floating values in VHDL code

Assume I want to have a continous sine signal as input to my VHDL code. The values will be of type float since it will take on non-integer values for example: 10.5 mA.

How do I manage these numbers in my VHDL code?

I have tried to use: type Voltage_Level is range -5.5 to +5.5; as an example but it did not work since i couldn't import signed vector into Voltage_level since Voltage_level must be represented as a signal.

I would appreciate if someone could help with these kind of issues? What is the most easiest way to deal with this?

The basic problem is when I input non-integer values, say 10.5 and try to use the same value as input the FPGA outputs a rounded integer, in this case 10. So it seems that I can use VHDL only when i deal with integers and bit vectors, which is very limiting use scenario. Especially for people like me that work a lot with various kinds of signals.

• 10.5 mA is 1050 µA. Voilà! An integer. Or, you might choose to think of it as 21 half milliamperes, or 42 quarter milliamperes. Also, both integers. The solution to your problem could just be a matter of choosing the right scale factor. Dec 11, 2017 at 18:21
• Rather than hacking things to make integers fit (which is viable but maybe ugly) you can use the synthesisable fixed point (or floating point) libraries in VHDL-2008. If it's simulation only, just declare subtype Voltage_level is real range -5.5 to 5.5; Dec 11, 2017 at 18:38
• @SolomonSlow Just a slight mistake: 10.5 mA is 10500 µA not 1050µA, that'd be 1.05 mA. Jan 21, 2019 at 12:32

## 1 Answer

Try using fixed point notation instead. Float point is bit tedious in VHDL. Since your range is not wide, you can use Fixed point representation. To see more about the fixed point visit : http://vhdlguru.blogspot.in/2010/03/fixed-point-operations-in-vhdl-tutorial.html

• I can't access the site eda-stds.org which has the download link for the package. I'm already using ieee.numeric_std.all; and math_real, according to github.com/peteut/vhdl2008c they should enable fixed point numbers. But when i type ufixed in my code it is not recognised as a function. Dec 12, 2017 at 9:30
• Some claim fixed_pkg is not supported by VHDL2008 Dec 12, 2017 at 9:34
• I use "ieee.fixed_pkg.all;" but the compiler says: Design library IEEE does not contain primary unit "fixed_pkg", even though I have the package in my quartus library directory. Dec 12, 2017 at 10:05