I'm trying to build a analog multiplier that takes in two voltages and produces the product of them. I have tried to simulate a circuit. Simulation with this methods is part of the objectives in the project. However the output doesn't even go as I expected. This is the basic layout of the circuit:
As you can see, I got 1 V on the both V1 and V2 input, but the output shows 9.23 mV. Is there any suggestion how to fix it?
So you have two inverting log amp circuits using U1 and U2 where...
U1_Vout = -Vt * ln(V1 / R1 / Is1) U2_Vout = -Vt * ln(V2 / R2 / Is2)
NOTE:
U1_Vout is the output voltage of U1
U2_Vout is the output voltage of U2
Vt = 26mV at room temperature
Is1 is the reverse saturation current for the diode (base emitter) junction of Q1
Is2 is the reverse saturation current for the diode (base emitter) junction of Q2
U3 is used as an inverted summing amplifier. Its output is...
U3_Vout = -(U1Vout + U2_Vout)
U3_Vout = Vt * ln(V1 / R1 / Is1) + Vt * ln(V2 / R2 / Is)
U3_Vout = Vt * ln(V1 * V2 / R1/ R2/ Is1/ Is2)
Finally U4 is used as an exponentiator.
U4_Vout = -R5 * Is3 * e^(U3_Vout/Vt)
U4_Vout = -R5 * Is3 * e^(Vt * ln(V1 * V2 / R1/ R2/ Is1/ Is2) / Vt)
Simplifying gives...
U4_Vout = -R5 * Is3 * V1 * V2 / R1/ R2/ Is1/ Is2
What you typically want from a multiplier is …
U4_Vout = V1 * V2 / 1V
But you have an extra factor F in the equation.
U4_Vout = V1 * V2 / 1V * F
Where...
F = (1V * R5 / R1 / R2 * Is3 / Is1 / Is2)
The solution is to multiply the output by 1/F. You can easily do that by simply adding a resistor from 9V to the minus terminal on you summing amplifier (U3). This will generate a constant offset in the output of the summing amplifier. The constant offset into the exponentiator will then show up as multiplication/division by a constant factor.
In your simulation lets assume that your transistors are all identical so Is1 = Is2 = Is3. Therefore...
1/F = 10K * Is / 1V
We need to find an offset voltage X that can be put into U4 such that …
1/F = 10K * Is / 1V = e^(X/Vt)
X = Vt * ln(10K * Is / 1V)
We know from your simulation that the output of U1 and U2 was 603mV
606mV= Vt * ln(1V / 10K / Is)
Solving for Is gives...
Is = 1V / 10K / e^(606mV / 26mV)
Therefore …
X = 26mV * ln(e^(606mV / 26mV)) = 606mV (exactly one diode drop)
Therefore the resistor you need to add is …
R = 9V / 606mV * 10K = 148.5K ohms
If you were implementing this as a real circuit the diodes would not all be perfectly matched. In that case the calculated value of R is approximate, and you would probably need a variable resistor to trim the gain of the circuit.
The output of U3 (a voltage) is tied to ground via the emitter-base junction of Q4. This is not going to end well. Didn't you notice that the output of U3 is 1.07 instead of 1.2?
To add to @user4574's answer (+1), another way is to add another log circuit like this:
simulate this circuit – Schematic created using CircuitLab
Then your output voltage will be \$V_{OUT} = \frac{V_1\cdot V_2}{V_{REF}}\$, for V1, V2 >0, Vref < 0.
If you actually try to build this there will be errors and probably it will want to oscillate merrily without capacitors across the transistors E-C. The bandwidth will vary greatly with voltage input.
