# Driving capacitance with a high voltage level shifter

I am having issues with a 'high' voltage level shifter I am creating. I need to drive a 28Vpp waveform with specific timings ( <.1us rise time, 1us pulse width), converting from the 3.3V logic that comes out of my microprocessor. I currently have the circuit below:

Which produces the following waveform:

Great! However, I will need to need drive a fairly long cable. When I add 100pf of capacitance to the output:

I get the following waveform:

This waveform doesn't meet my requirements of having a rise time of less than 0.1us. What can I do to overcome this? I have tried replacing the transistor based circuit with an LM139 comparator, but that was still susceptible to capacitance. Are there ICs available that could fix my issue? I can handle about 4us of prop delay if needed. Thanks!

• Your first task should have been to calculate the RC cut-off frequency of the 1K and 100pF. That is ~1.6MHz so no way it could work. That makes me worried about the rest of the project. Also what kind of cable, what is the impedance you have to drive, how long and what is at the other end. (That has to do with reflections). Dec 23, 2017 at 20:04
• There is charge storage in BJTs that must be overcome by careful design. For example, if you are actively pulling upward on the base of a BJT to increase collector current with a resistive load, the collector will actively pull down on the resistor. Good. But if you are actively pulling the base downward to reduce collector current then all you have is the resistor to pull the collector back upwards. That's slow. It takes time to sweep out charges, too. External design choices and topologies can help. Input source and output load also matters. I don't see "design" here for speed.
– jonk
Dec 23, 2017 at 20:05

Since you're getting the output from the collector, the output impedance of the whole circuit will be the R3, 1k. It's quite high to drive a capacitive load, because if you connect one then it will form a low-pass filter with a cutoff frequency of $f_c = 1/(2\pi \ 1000 \ C_L)$. For a 100pF load, the cutoff frequency will be around 1.6MHz. That's why you cannot meet the rise-time requirement.

The output impedance should be low. Extremely low. You can try the following circuit:

simulate this circuit – Schematic created using CircuitLab

The first stage is a translator and the output is a push-pull output stage having extremely low output impedance.

The following is designed to achieve approximately rise and fall times near where you are discussing.

simulate this circuit – Schematic created using CircuitLab

It assumes that your drive impedance in about $100\:\Omega$, which is common enough these days in MCU output pins. It also assumes that your load is resistive and at least $10\:\textrm{k}\Omega$. So this is for demonstration purposes only, to point out the kind of work you need to do.

It's not necessarily a solution for your case. Especially since your title says you are driving a capacitance as a load. So this is educational only and partly written up to make a point. (It might drive a capacitive load of $1\:\textrm{nF}$ as fast as you are looking for, as shown. But no more than that.)

Here's a simulation image using the standard small signal, general purpose BJTs. Nothing special about them (they are definitely NOT RF transistors.)

I'll let you work out the edges and pulse width by inspection. But they measure about $\approx 30\:\textrm{ns}$ rise and fall for a $\approx 1\:\mu\textrm{s}$ pulse width. (I have no information on your MCU's rise and fall time specifications for its output pin driver. So that will need to be added in.)

Please take note of the added details, which include speed-ups and some diodes, as well as a little bit of base impedance at $Q_3$ to stem oscillations. Not shown, but perhaps useful, are the usual local sets of decoupling capacitors.

If your output load is significant or is otherwise not resistive, a lot more may be required. Again, this is just pointing out the details needed for something where the load is light and resistive (in other words, "simple.") As you can see, there is stuff to do to get rapid shut-off and turn-on even when the load is relatively easy to drive.

The problem is that your capacitance is charged through a resistor. When Q2 turns off C1 is charged up by R1 in a typical RC charge curve. From $\tau = RC$ we can calculate the time constant $\tau = RC = 1k \times 100p = 100\ \mathrm{ns}$. The waveform should reach 95% of V2 after $3\tau$ and this seems to be the case.

To improve the waveform you have three options:

• Decrease R.
• Replace R with a current source. This will give a linear rise in voltage rather than exponential.
• Use a totem-pole output stage with Q2 pulling low and another PNP pulling high.