# Help to calculate heat dissipation on plastic dual in line DIP package (DIP-8 opamp)

Question is about maximum chip heat dissipation (and not about efficiency or correctness of this design).

Circuit is quite simple: put in parallel 30 Dual Opamps in 8 pin DIL package (i.e 60 opamps in parallel in unity gain configuration) to pilot 4ohm load. For each opamp there is a 5 ohm resistor (Rout) at their output to avoid they fight each other.

Vin is a sine wave of 1KHz (about 12 VACmax) In theory 12VAC on 4ohm would be 36W @ 3A This split by 60 opamp, means roughly 600mW @ 50mA load each opamp.

R=4ohm

No Chip=30

No OpAmp=60

RShared= 4ohm * 60 opamp = 240ohm

Rout single = 5ohm

RL = RShared + Rout = 240 + 5 = 245ohm

So I suppose each opamp will be current-like loaded by 245 ohm. (Correct?)

Then I need to calculate package dissipation for a DIL 8 pin plastic package:

Tj Max = 150°C

OJA = 130°C/W (8-LEAD PDIP PACKAGE) from datasheet

Current max (from datasheet) for each opamp is

IS Max = 8.7mA

Vs+ = 15V

Vs- = -15V

PSupply Max each opamp= (15 + 15 ) *8.7 = 261mW

Datasheet says (pg 10): "worst case power dissipation occurs at the maximum supply current and when the output voltage is at 1/2 of either supply voltage (or the maximum swing if less than 1/2 supply voltage)".

For each amplifier PDMax is:

PDMax each=

= PSupply Max + (Vs+/2)^2/RL

= 261mW + 230mW = 491mW

For total chip (dual op-amp):

PDMax chip= PDMax each * 2 = 982mW

TJ Chip: Tj= TA + (PDMax * 130 °C/W) = TA + (0,982 * 130) = TA + 128°

TA Max = Tj Max - 128° = 150° - 128°= 22° (<< 70°C !!!)

As my ambient temperature is 25° or even above, any heatsink on the DIP 8 chips would not work, and will my amplifier smoke in any case??

I really need to change the Op-amp or increase the number of op-amp or give up to this project?

Is this correct? Are all above assumptions correct? Many thanks.

THIS IS THE LINK TO THE DATASHEET

• 150°C is an awfully high junction temperature for reliable operation, especially in a plastic package. More like a storage temperature. Please link the proposed op-amp datasheet. What is your proposed maximum ambient temperature around the PCB? Dec 24, 2017 at 6:35
• The datasheet was already linked in blu at the end of the message. Chips are mounted on socket and the air in the case will be aroud 40 (max 50) degree I can think. No fan will be included. Thanks Dec 24, 2017 at 6:47
• I did read your opening statement, but still, could you provide the rationale for such a design? In particular, why did you choose that opamp and what problem are you trying to solve? This will improve the question and make it more useful for other people browsing the site. It will also open the way for some more general answers. Dec 24, 2017 at 9:08
• (7.5)^2/245 <> 57mW Dec 24, 2017 at 14:06
• LTspice is a little more conservative as it considers a quiescent typical current of 6.3mA (pg3 of datasheet), thus a Power dissipation of 189mW per opamp only (instead of 261mW max) with no AC signal. So simulation is correct if according to average/typical values. By using these, plus a RMS power dissipation of 172mW average, we would get 361mW (722mW in total) that means a TAmax of 56° which looks to be achievable with an heatsink. The project looks still alive, doesn't it? Dec 24, 2017 at 23:25

The issue with this math is it works in theory, but in practice it may be widely off.

The math only works if all 60 op-amps work exactly in unison. That is a big ask. Any propagation delay in the input signal from the first to last op-amp will create a standing wave of higher current through the devices. Moreover, variances in gain and slew rate from device to device will cause hot spots in your array. These effects will also add distortion into your resultant output signal.

These are the reasons we do not typically double up (or more) devices to increase current drive.

Okay, your supply current number is a bit low (9mA is the maximum from the datasheet, 8.7mA is for +/-5V). So that's 18mW more, so a couple degrees C more heating.

If you work to the absolute maximum 150°C junction temperature the numbers work out for a maximum ambient of about 65°C. If your device will never have to work in a temperature (around the chip) higher than that, and if the thermal resistance in a socket is 130°C/W then you are fine. TI suggests a 5-10% derating for socketed parts which is cutting it closer. There will be some rise due to any enclosure as well.

On the other hand if this is only going to be used for AC signals your average dissipation will be considerably less. The above number is for the somewhat pathological case of a DC signal held at the exact worst-case output voltage.

A heat sink can't hurt (well unless it becomes unstuck and shorts something) and it could keep the junction temperatures down a bit, and further away from that absolute maximum limit of 150°C, improving reliability.

• I took 8.7mA +/-15V in page 4 as the supplier did in page 10 in the example. Thanks Dec 24, 2017 at 7:45
• Ah, crap- wait he has 980mW Isn't that correct? Aavid has a slip-on heat sink claimed 30 deg C/W for dip-8. One of those expensive anisotropic sheets to a single heatsink might work but would require testing with thermocouples. A linear array, not X-Y is preferred perpendicular to natural convection. Dec 24, 2017 at 16:19
• @SpehroPefhany still, I suspect this could be an XY problem, unless it is a proof of concept that opamps can be paralleled. I prompted the OP to give more hints about why he is doing this, but got no response. The 4 ohm load smells of loudspeaker and the working frequency is in audio band. Could this be an attempt to build a siren sidestepping proper power amp design? Dec 25, 2017 at 10:45
• @LorenzoDonati Well it's his business (more or less) but I suspect it's an extreme audiophile audio amplifier. Thirty \$5 chips per channel would fit there and it's actually not insane- my Agilent function generator uses a few amplifiers in parallel for 50R output Z. Of course a reactive load may raise other questions outside the scope of this one. Dec 25, 2017 at 10:57
• Well, I think I finally come to the end. Let us assume Rjc = 52C/W. I will use two heatsink (100mm*90mm*17mm) of 1.7C/W covering every 15 devices (or 30 opamps) with thermal pad (0.34 C/W). Worst case according to supplier formula is to dissipate 980 mW per chip. So: T.amb= 55°C in close enclosure still air T.heatsink= 55°C +0.98*15*1.7 C/W= 80°C T.case= 80°C +0.98*15*0.34 C/W= 85°C T.junc= 85°C +0.98*52 C/W = 135°C = 90% T.junc max !! Dec 26, 2017 at 22:28