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I'm trying to communicate with 32 microcontrollers (PIC 12f675). These are used to control 32 DC motors and 2 sensor for each PIC. So only two pins are left to communicate with master device. I want to send signals (how much rounds to rotate and direction) to these 32 slave PICs in one master device.

PIC 12F675 hasn't I2C or SPI hardware. So I want to communicate with some bitbang technique. (PIC 12F675 running at 4 MHz internal clock)

What is the best way to do that? (I prefer to use C language (xc8))

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  • \$\begingroup\$ you did not say how often commands need to be sent. .... maybe the best way is to adapt the IR protocol that is used for tv remote controls .... here is one of them sbprojects.net/knowledge/ir/nec.php ... click on the arrow at top right of page for other protocols \$\endgroup\$
    – jsotola
    Jan 2, 2018 at 18:49
  • \$\begingroup\$ One command at 1 second will be enugh. All ICs are in very colse range. I want to use Wired communication (rx tx, two wires bus) \$\endgroup\$ Jan 2, 2018 at 19:32
  • \$\begingroup\$ What else does this chip do? Since it has only 1024 bytes of program memory, it will be filled quickly. \$\endgroup\$
    – Jeroen3
    Jan 3, 2018 at 9:21
  • \$\begingroup\$ Nothing else, the PIC 12F675's only task is to control motor position and direction. I use two sensors to do that task. And receive master device signals how much rounds to rotate and direction. \$\endgroup\$ Jan 3, 2018 at 17:37

2 Answers 2

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If wiring permits, the simplest approach is to have one wire which is an output from the master to all slaves, and the other of which is a return wire shared by all slaves to the master, and give each slave a separate "hard-coded" address which is also hard-coded into the master. Using such an approach and having each slave communicate only when spoken to will eliminate the need for arbitration.

If you have any sort of periodic interrupt in the master and slave, I'd suggest using normal UART-style communication with the additional proviso that the traansmit line will be idle for at least 12 bit times before any command, but all the bytes of each command will be sent consecutively with at least 1.1 but no more than 5 stop bits between them. Then any slave that decides a command isn't of interest to it can ignore everything that happens unless or until it sees the line idle for at least 10 bit times.

The data return wire could be implemented using an open-collector/open-drain approach (use a pull-up resistor, and have slaves pull down the wire when they want to send a "0" and leave it floating when they don't), but that would be slow and sensitive to noise. Speed and noise immunity could be improved by not using open--collector/open-drain approach, but instead having nodes include a circuit like the following on their output wires:

schematic

simulate this circuit – Schematic created using CircuitLab

If the PIC drives the output high, the bus will be driven high, and likewise if the PIC drives the output low. If the PIC leaves the output floating without any internal pull-ups enabled, which it should do whenever it has nothing to say, other devices on the bus will be able to pull it high or low without impediment.

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  • \$\begingroup\$ Did you suggest opposite of open drain. I will implement this ans post code here. \$\endgroup\$ Jan 3, 2018 at 6:02
  • \$\begingroup\$ @AsithNiwantha: The circuit is an alternative to using open-drain, which avoids the speed/noise trade-offs that would be required to use it. \$\endgroup\$
    – supercat
    Jan 3, 2018 at 6:03
  • \$\begingroup\$ @AsithNiwantha: Edited post to clarify that the given circuit is an alternative to open-drain which "still" only requires one I/O pin. \$\endgroup\$
    – supercat
    Jan 3, 2018 at 6:05
  • \$\begingroup\$ I implement your idea and test it. The internal clock and 4 MHz max clock speed will get some errors for bitbang. The timing isn't good enough. I need some suggestions to overcome that issues. If send signals are reliable, then no need of feedback from slaves. So the other pin can be used for clock for TX pin of master. \$\endgroup\$ Jan 4, 2018 at 16:14
  • \$\begingroup\$ @AsithNiwantha: What sort of communications approach are you using for bit-banging, and what all do your slaves have to do? If you can have your slaves wait for communication while doing essentially nothing else [except perhaps check for a timeout], then do everything they'll need to do in response to a command before they listen for another one, etc. you should be able to get good performance quite reliably in the absence of physical noise. \$\endgroup\$
    – supercat
    Jan 4, 2018 at 22:17
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As you mention Rx and Tx you want to have bi-directional communication.

I would go for the old-fashion UART protocol. No need for a clock thus your code can then concentrate on one pin at a time. There are lots of UART bit-bang example codes out there.

Post edit:
For the return channel (Tx on the slaves) you have to make sure that the salves don't interfere with each other. First makes sure only one slave is transmitting at a time. The simplest method is that slaves only respond after they receiver a 'read' command from the master. All the slaves that do not transmit have their output tri-stated (See comment from @supercat above)

Then it is good to have a pull-up resistor on the line so it is in a defined state if none of the slaves is active (All are tri-stated)

I have implemented a single UART return protocol just like that on a commercial product. If you do it right it works. The difference is that in my case the output of a slave was set to 0 and I would control the tri-state pin to simulate an open-collector output. That way there is no short circuit if I accidentally make en error in the program. Recently there was a question about tri-state and open collector equivalence on stack exchange but I can't find it anymore.

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  • \$\begingroup\$ But it get some errors when connect all 32 diveceses to one bus. Can't figure it out when the errors comes. Thats why i want some acknodgemwnt from slave devices. \$\endgroup\$ Jan 3, 2018 at 5:47

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