I'm working on my first project with the STM32F103C8T6. The main purpose is to use its ADC on its resolution limits (signals about ~1mV). Many schematics on the internet put an LC filter between the main 3.3V (Vdd) and the analog power supply (VddA), just like that:

LC filter

My power supply uses a DC/DC converter MP1584 module for better efficiency (required). Besides the inductor inside the module (module schematic) I'm using an LC filter with a zener at the output, as below (the MP1584 below is the module and not the IC).

Power Supply circuit

The 3.3V label supplies both analog and digital circuits. The digital circuits includes high frequency (bad I know) such as SPI. I intend to route the LC fiter for the VddA as close as possible from the uC. But because of the oscillator crystal I was forced to put the inductors (L1, L2) right below the uC to save space.

uC schematic

So I have some questions:

  1. Looking at my power supply circuit, the LC filter for the VddA is really required? It's going to make any effective difference? Or it's just to isolate analog and digital?

  2. There's any problem to route the inductors below the uC? They're not suppose to switch at high frequencies, so it's OK for EMC?

EDIT: Just to add some more infos: the top layer is GND and the bottom is 3.3V.

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    \$\begingroup\$ Be careful with LC filters on the output of power supplies. If you have load transients, especially near the resonant frequency of the filter you can have large overshoot and ringing. You have what looks like a TVS clamp on the output, but if it has a stand-off voltage of 3.3V it may not clamp soon enough to protect the semiconductors. \$\endgroup\$ – John D Jan 3 '18 at 22:11
  • \$\begingroup\$ Putting filter inductors near the IC means they might couple to switching done BY the IC, which is counterproductive. A ground plane between the IC and the inductor would be beneficial. Especially for "LC1' which can offset your analog ground. \$\endgroup\$ – Whit3rd Jan 3 '18 at 22:30
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    \$\begingroup\$ For an LC filter to be effective you need to know: What noise at what frequencies am I trying to filter out. Does the filter provide the needed attenuation at those frequencies. Often this is difficult or impossible to determine. I would forget the LC filters and use a dedicated linear regulator for VDDA, connect VSSA directly to ground. \$\endgroup\$ – EE_socal Jan 4 '18 at 0:08
  • \$\begingroup\$ The inductors expose the MCU and the external XTAL to non-syncnronous trash, which causes time-jitter on the MCU clock. Why? Time-jitter = Vnoise / SlewRate. A 10MHz xtal osc with 2vpp XTAL output has SlewRate of 63Million volts/second. Assume those inductors inject 0.1 volt of trash into the XTAL's interface to the MCU's convert-sin-to-squarewave. The jitter is 0.1v / 63Million volt/sec = 1.6 nanoseconds jitter. Can you tolerate that? MCU onchip PLL multipliers, say 20X to 200MHz, may or may not handle the XTAL jitter gracefully. \$\endgroup\$ – analogsystemsrf Jan 4 '18 at 3:36
  • \$\begingroup\$ @analogsystemsrf I'm using a 8MHz crystal. I get your point. The PLL is 9x which is OK for jitter that you calculated correctly. Besides, 0.1V might be to high for an inductor that does not switch high amplitudes. \$\endgroup\$ – Francisco Gomes Jan 4 '18 at 11:56
  1. Yes the filters are required. The STM32 use the analog supply voltage as reference voltage. Thus any noise on the VDDA will end up as noise in your measurement.

  2. As you have low dI/dt, and thus low magnetic fields, this shouldn't be a problem. At least there shouldn't be any significant coupling from the inductor into the STM32. Coupling from the STM32 to the inductor might happen though, but I would guess that the added noise will be swamped by the ADC noise. I would not worry about injecting into the crystal. For one thing, injecting into the crystal (a high Q element) is not easy unless you hit the right frequency. And for another, actually injecting substantial current (or voltage) requires lots of power. As mentioned above, there is not much energy in the fields of the inductors.

What you didn't ask: You are talking about 1mV signals. The ADC in the STM32 will not be able to resolve that, or rather you will get nothing but ADC noise. 12bit resolution on a 3.3V span mean that 1LSB is 0.8mV. You will need to amplify the signal at least by a factor of 1000 in order to measure anything. Also keep in mind that the STM32 ADCs are known to be very noisy, to the point where ST wrote a few AppNotes how to average ADC samples to have even a chance to get to the advertised resolution. Unfortunately, you cannot filter out all noise. So that ADCs of the STM32 are best described as a GIGO system. (Some of the STM32 ADCs have a measured of ENOB of 6bit!)

DB3 is on the wrong side of UB1. You want to protect the circuit from transients. If the transients pass through the DC/DC converter and destroy it, you may get the full input voltage on the 3.3V rail, which in turn will fry your ciruitry (DB3 will not protect against that, either because it doesn't conduct or because it will be fried and potentially form an open circuit).

There is a too big value gap between CB1 and CB2. The resonance of CB2 (acting as a capacitor) and CB1 (acting as an inductor) might cause EMI. Either add at least a 33nF capacitor or better, a 10nF and a 100nF. CB3 can be IMHO left out, as the module's on module capacitors will already block those high frequencies. Alternatively, you can choose one of the Murata EMIFIL pass through capacitors, which have a much higher self-resonance frequency, thus can replace a few smaller valued capacitor steps.

LB2 will potentially induce EMI problems, unless you know very well how to design your ground paths. It's best to leave it out and filter on the power rail only.

You do want to add at least 1nF, 10nF 100nF capacitors between UB1 and LB1. Otherwise the short wire to LB1 and the stray capacitance of LB1 will cause EMI problems.

LB1 (together with LB2 if not removed) and CB4 form a resonant circuit. Unless it's resonance frequency is way out of everything that you produce (very unlikely) you will get resonance effects (as John D mentioned in the comments above). You should add a properly sized R-C snubber circuit to dampen this resonance.

  • \$\begingroup\$ Thank you so much for your considerations. About the 1mV signal, I think that I didn't make myself clear. The signal goes from 0 to 3.3V, but it's intended to have a 1mV resolution. You're right about DB3. The picture doesn't show it but I have a overvoltage protection circuit before UB1. I changed the capacitors following what you said. What did you mean about LB2? The power supply's GND goes by a track to LB2 and after him I use a ground plane. The plane is far from the MP1584's circuit. I'm aware about the resonance and it's ok for my propose. I just don't get why LB2 may cause EMI \$\endgroup\$ – Francisco Gomes May 6 '18 at 19:29
  • \$\begingroup\$ Broken ground usually causes more problems than it solves. For more information see the book "Essentials of RF and microwave grounding," and the EDN article series: edn.com/design/analog/4394761/… \$\endgroup\$ – Attila Kinali May 6 '18 at 19:41

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