I've gotten interested in using GaN FETs for their combination of fast switching speed and very low on-state resistance. Most of the eval boards (for example by EPC) use GaN driver chips such as UCC27611 and LM5113 which regulate the gate voltage to 5V and clamp transients.

Now, looking at some of the smaller GaN FETs like EPC2037 which has 0.12nC gate charge or EPC2036 with 0.70nC, I'm wondering: is there any reason this cannot be driven directly from a 3.3V microcontroller pin?

If the microcontroller can source/sink 25mA, the switching time is in theory only 0.12nC/25 mA = 4.8ns, and that's without a driver (!!). The real switching time may not be quite as good of course, but it should still be super-fast compared to a non-GaN FET. I would like to tie the gate to a microcontroller pin without a gate resistor, if possible.

Now, I can see from the same datasheet that FET won't be fully on at 3.3V, but does this have any negative effect other than slightly higher heat dissipation? I'm okay with lower efficiency, just want to know if there are any pitfalls of the kind that could make the FET fail.

(My use scenario is switching 5V 1A at ~1MHz, I think 20-50ns switching times should be fine but faster is better. The microcontroller is STM32F103)

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    \$\begingroup\$ Ultra Low RDS(on) = 0.5R.. say what now? \$\endgroup\$ – Trevor_G Jan 4 '18 at 20:37
  • \$\begingroup\$ @Trevor Hmm, true... the EPC2036 is better in that regard, 62 milliohm, I was looking at both devices. In this case I'd like the fastest possible switching without a gate driver and so I may prefer the 2037 anyway, but yeah, that is pretty high resistance \$\endgroup\$ – Alex I Jan 4 '18 at 20:45
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    \$\begingroup\$ I guess it's relative. To answer your question they should work direct from 5V logic, at least the EPC3037 will on a cursory look. Static gate current is a lot higher than a MOSFET though. Gate-to-Source Forward Leakage 1mA max. \$\endgroup\$ – Trevor_G Jan 4 '18 at 20:53
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    \$\begingroup\$ It will work at 3.3 but I would not be trying to pull 1.5A at that, not with the 3037 anyway. \$\endgroup\$ – Trevor_G Jan 4 '18 at 21:09
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    \$\begingroup\$ piece of advice.. GaN switches are fickled little devices. You cannot drive them too negative (like -8V max), the inductance from the drive to the gate needs to be low as the millar capacitance does everything possible to counter what you are doing. \$\endgroup\$ – JonRB Jan 4 '18 at 21:49

Driving the gate to 3.3 V is within specification, so nothing bad should happen.

However, note that Rdson is only guaranteed for 5 V gate drive. The graph of Rdson as a function of gate voltage gives you some guidance what you will get at 3.3 V, but this is not a guarantee. It looks like you should expect around 600 mΩ. You can't base a volume design on "probably around".

Despite the marketing hype at the beginning of the datasheet about exceptionally low Rdson, the Rdson is actually quite high. The gate leakage current is also quite high.

It seems the unusual aspect of this FET is that it can switch 100 V with only 5 V gate drive. If you only need to switch 30 V, or can provide 10-12 V gate drive, there are much better FETs. This is definitely a specialty part. I haven't looked up the price, but I expect that says "specialty" too.

The package also pretty much requires hot air soldering for manual work, unlike a SOT-23 which can be soldered with a ordinary soldering iron.

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    \$\begingroup\$ The Rds(on) is very low for the amount of gate charge. A 100V MOSFET with comparable gate charge would have an Rds(on) of 10 ohms or more. \$\endgroup\$ – τεκ Jan 5 '18 at 5:12

As far as I understand it is possible, because you surpass the maximum Gate Threshold Voltage (2.5 V). The think you have to take into account is that you don't have much headroom to tolerate noise that could be induced in the gate voltage. Many normal Si MOSFETs have thresholds around 2-3 Volt, but int most cases a driver with higher voltage (5 - 10 V) is used to have enough headroom for induced voltage spikes that could get gate voltage below thresholds for some instant. I'm not sure if you can avoid this by making a good enough layout in your case.

The second reason for using higher voltage is the Rdson will be lower, but if you are ok with it, and the dissipation of the MOSFET is enough to assure that the maximum temperature is not reached, then this should be no problem.

The third problem to use a gate driver is because of the high power/current delivered to the gate, but this GaN FET, seems to need very low average current:

0.08 nC * 1 MHz = 80 uA

(Note that the gate voltage is no 0.12 nC, but 0.08 nC at 3.3 V.)

Of course, as you said switching time will be much higher than expected due to the internal resistance of the microcontroller outputs, so it will take longer to fill the gate capacitance. I'm not sure about this internal resistance of the microcontroller, so I cannot say much about it.

Seeing all this, seems logic to say that it could work, but it is risky because of the low headroom to threshold voltage.


If higher resistance is not an issue, I'd still look into the fairly reduced current limit. At 3V, the FET will enter the linear region at about 1A of drain current. At this point the "RdsON" if the term is still valid will sky rocket, with potentially destructive power losses. Mind that your FET is 0.9 x 0.9 mm^2 !!!

Moreover, appart the 3.3V ON voltage I'd worry about the true 0V "OFF" voltage when using a microcontroller to drive GaNs. Not all micros have guaranteed rail to rail output, especially under load. GaN transistors can have extremely low turn thresholds (down to 0.8V). Couple that with extremely high transconductance (how much RDSon change per Vgate) and you can fully turn ON your FET just by putting a fast enough signal on the drain (and I mean drain, not gate). The low gate source capacitance of GaN proportionally increase the effect of the miller capacitance compared to Si FETs.

It all depends on your system. Si Mosfets are pretty much topology agnostic (high Vth, reasonable transconductance, high Cgs/Cgd "stability" ratio) - GaN is not. A Si FET that you want OFF usually stays OFF no matter what you do to it. For GaN, you must know the system around the transistor to tell if the OFF state will be kept. Most important is :

  • Do I have an half Bridge ?
    • Yes : take extreme care of the OFF state driver pull down strength. Drain induced turn ON are most of the time destructive. If hard switching, Rpull down must be 10X smaller than Rpull up.
    • No : Drain inducted turn ON reduce efficiency but are usualy not destructive.
  • Do I have soft switching ?
    • Yes : about any gate drive would work. I drive the EPC2107 in a HB with a TLV3201 comparator (not even rail to rail output) at 5V Vcc without issues. Startup can be tricky for half bridges.
    • No : beware of drain induced turn ON.

Clearly, the bad case is half bridge with hard switching - and also one of the most present usecase for GaN (synchronous Buck).

When switching GaN the ratio of miller capacitance off the high side and low side FET (mind the non-linearity) mean the driver in the OFF state has to provide about 10X more current than the drive turning the other FET ON. Fail to properly dimension this mean the OFF FETmay turn back ON with the turning ON of the other - it's a shoot trough.


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