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I am trying to understand the advantage of using a 'load switch" for switching applications.

The load switch (like the one below), has two transistors to do the job. Why can't I just use one transistor (bjt/fet) for doing the same thing?

Basic load switch configuration

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    \$\begingroup\$ what's the capacitor for? \$\endgroup\$ – Cano64 Jan 5 '18 at 16:12
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    \$\begingroup\$ @Cano64 It slows down the PMOS turn on, primitive inrush current limiting. \$\endgroup\$ – Matt Young Jan 5 '18 at 16:58
  • \$\begingroup\$ Its a picture from online. It is not a must for the capacitor to be there. But it has its benefits... \$\endgroup\$ – Tahseen Jan 5 '18 at 20:48
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You could use a single FET, but there are several advantages to using a load switch IC.

  1. Voltages higher than the micro voltage can be switched. (That can also be done by using 2 transistors. )
  2. The load switch has inrush current limiting built in. This can be done with discrete components as well, but requires more engineering.
  3. More often than not, load switches have monitoring, such as power good or overcurrent outputs, etc.
  4. Tolerance analysis is easier when that entire circuit is on one die with guaranteed data on its performance.

As with all things engineering, trade-offs.

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In addition to what other respondents have already written, a switch made with a single power MOSFET will have a body diode between source and drain. As a result, the switch can block current only in one direction. In the other direction, the body diode will conduct whether the switch is open or not.

An integrated load switch typically can block current in both directions. This is done either by controlling the bias of the bulk in the MOSFET, or by using two MOSFETs back-to-back.

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In this case, the second transistor is performing a level-shifting function. The P-channel MOSFET requires an active-low control signal that is referenced to its source terminal (i.e., across the resistor). The N-channel device allows you to control the switch using a ground-referenced active-high logic signal, which is much more convenient in most applications.

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The purpose of this very common design, which includes BJT transistors as well, is to isolate the 'EN' signal, which can be from a low voltage source. Also the source may not tolerate high voltage above 3.3 VDC or 5 VDC logic voltage at its output terminals.

The PMOS transistor could also be most any PNP transistor. It can switch an extremely high voltage on or off, such as 300 VDC for a long string of LEDs. It could be the main power switch for all sorts of gadgets while keeping 'EN' isolated. The maximum voltage limit for MOSFETs right now is about 700 VDC.

I should note that the NMOS transistor will be exposed to the same Vin voltage through the bias resistor, which is used to make sure the PMOS is OFF if 'EN' is low or at its ground/source voltage (zero volts). The NMOS can be the type that turns on full at about 5 VDC or 10 VDC, depending on the logic driving it.

EDIT: Because the PMOS is grounded when it is turned on, the limit for Vin is 20 VDC or less. Thanks to @BeBoo for pointing that out. For higher voltages the gate-source voltage would have to be clamped with a zener diode.

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    \$\begingroup\$ That's not quite true, at least with the OP's circuit. If Vin was 400V, it would break the pmos when the gate is driven to ground, because the Vgss would exceed the pmos specification. Even for mosfets rated to 4500Vdss, the Vgss limit is still around 20V. \$\endgroup\$ – BeB00 Jan 5 '18 at 3:09

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