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When designing analog circuits with feedback loops, attention must be paid to concepts such as gain and phase margin, open-loop gain, closed-loop gain, etc. in order to prevent oscillations (if you're not designing an oscillator, that is).

Why is the topic of stability and oscillation primarily relegated to the domain of analog electronics? Digital circuits certainly contain feedback loops. So why do we not have to worry about stability criteria and Bode plots when we design digital circuits?

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    \$\begingroup\$ How would you define the magnitude (y-axis of the Bode plot) for digital signals? \$\endgroup\$ – Curd Jan 6 '18 at 21:45
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    \$\begingroup\$ So why do we not have to worry about stability criteria Who says we don't? Digital circuits can become unstable as well. But digital circuits are (mostly) time discrete and that means different stability criteria. Bode plots etc. only apply to analog circuits which can be analyzed in the frequency domain. \$\endgroup\$ – Bimpelrekkie Jan 6 '18 at 21:54
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    \$\begingroup\$ You certainly do have to worry about stability criteria with some digital circuits; limit cycle oscillations in IIR filters, or overload conditions in delta-sigma convertors for example. \$\endgroup\$ – Brian Drummond Jan 6 '18 at 22:20
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    \$\begingroup\$ I think I like what Bimpelrekkie said very much; also: it's all "easy" to calculate if your signal is actually digital, but guess what: digital circuits are actually made of analog components. That gate capacitance of your switching mosfet that you're driving with another mosfet? Sure as hell is a capacitance. Sure as hell, things will oscillate. The problem is to design the components and circuits in a way that all oscillations stay small enough to not cross the (typically binary) threshold. \$\endgroup\$ – Marcus Müller Jan 6 '18 at 23:12
  • \$\begingroup\$ @Bimpelrekkie Why could we not break the digital square wave into frequency components and analyze in the frequency domain? If we pass a small-signal square wave through an amplifier, the circuit would then be time discrete, but we would still use standard techniques (Bode plots, etc.) to analyze stability criteria, correct? \$\endgroup\$ – pr871 Jan 8 '18 at 14:08
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Why is the topic of stability and oscillation primarily relegated to the domain of analog electronics?

Short Answer: It may have been in a 401 elective you didn't take in non-linear circuits or you have yet to take in the "university of Life" in real design.

It may be taught this way for overlooked for undergrads, but those who have done serious design debugging have learned that all logic chips follow linear circuit behavior with gain and impedance when operating in the transition output voltage range.

Logic families are designed with a specific current limiting source impedance (RdsOn) for lowest latency at defined pF loads. They are not internally compensated like Op Amps. As a result buffered or 3 stage inverters are often explicitly avoided in ceramic and Xtal resonator designs to avoid parasitic oscillations at harmonics of the crystal fundamental.

Although one could get away with buffered inverters in CD4xxx series follow-on generations had higher bandwidth and lower impedance increasing the opportunity for parasitic oscillations near unity gain or at resonator harmonics.

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