(I've reworded this question from earlier)

I ground the input of an ADC that has 50 Ohms internal termination, and observe a noise waveform. I measure the RMS voltage of this waveform.

Then I remove the ground at the ADC input and terminate the ADC input to 50 Ohms (just a resistor to ground, that's all). I measure exactly the same value for RMS voltage of the resulting waveform.

Assume this ADC noise is Gaussian (random).

Now I connect my signal to the ADC. Will the ADC noise above (the RMS value) add directly to the "true" signal? So, if I measure 2 mV RMS when grounding the input, will the observed signal be the "true" signal plus 2 mV RMS noise?

Or, is the noise generated internal to the ADC flowing through the internal ADC termination such that when I connect my signal source with 50 Ohms termination, the voltage divider that results cuts the observed signal in half as well as the input referred noise from the ADC? (So, I'd observe the "true" signal plus 1 mV RMS noise.)


closed as unclear what you're asking by Marcus Müller, Sparky256, Voltage Spike, Turbo J, Bimpelrekkie Jan 12 '18 at 6:39

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  • 1
    \$\begingroup\$ So, you have devised some odd formulas, with unspecified parameters, and ask EE community "what is it"? Maybe you should explain where did you get these formulas... \$\endgroup\$ – Ale..chenski Jan 7 '18 at 16:25
  • \$\begingroup\$ Just off the top of my head to help clarify my question. \$\endgroup\$ – user46688 Jan 7 '18 at 16:25
  • \$\begingroup\$ So then, what is M? \$\endgroup\$ – Ale..chenski Jan 7 '18 at 16:26
  • \$\begingroup\$ Also, noise from an open channel has nothing to do with anything, at most it is the thermal noise from a huge input impedance resistor. You should evaluate the instrument noise from SHORTED channel. \$\endgroup\$ – Ale..chenski Jan 7 '18 at 16:30
  • \$\begingroup\$ Let us continue this discussion in chat. \$\endgroup\$ – Ale..chenski Jan 7 '18 at 17:30

There are at least two kinds of noise in a channel. One source is a classic thermal noise of equivalent source impedance, which depends on channel bandwidth. The other is an inherent noise of ADC (sample-and-hold noise, analog front-end noise, etc.).

In this case the scope already has a fairly low input termination, 50 Ohms. Adding anything in parallel will only lower that impedance. If the result on an oscilloscope (ADC) doesn't change with adding another 50 Ohms at source side, it means that the thermal noise is negligibly smaller than the quantization noise of the scope's ADC. So in your formulas, M=1.


But adding a 50 Ohm terminator to Ch 1 did not change n(t) at all, which makes me question my understanding.

Oscilloscopes are usually rather noisy, so n(t) may be dominated from internal noise in the scope itself - which is not affected by an external resistor at all.

Question 1: What is M?

That looks a lot like signal-to-noise ratio.

Question 2: How would n(t), the signal I observe on ch 1, change

Changing the termination can have "interesting" effects on a high frequency transmission line for example.

Bottom line: You cannot tell without a schematic and also layout in high frequency cases.


Your ADC will have the following internal noise sources

(1) KT/C of the Vin sampling capacitor; 10pF cap has 20microVolts RMS noise; 1,000 pF cap (100X bigger) has 2 microVolts RMS noise; delta-sigma ADCs achieve low noise floors by massively oversampling; turns out oversampling 100X has the same effect on noise floor as making the Sample Cap 100x larger.

(2) KT/C of any Voltage Reference Sampling capacitors

(3) KT/C of any capacitors used in binary-charge-nulling for the approximation algorithm

(4) any FET switches used in moving charges around (often disguised as KT/C noise)

(5) thermal noise (including 1/F noise) of any onchip opamps involved in copying charges from one caoacitor to another capacitor; Power Supply Rejection will be important here

(6) time-to-make-a-decision noise of the analog comparators; ditto about the PSRR

(7) if you are converting RF or sinusoidal signals, the timing jitter (aka phase noise) becomes a big deal; any transistor that touches the sampling edge, or that controls the biasing of any transistor that touches the sampling edge, will add to the timing jitter (in Root Sum Square manner)

(8) noise on the GND and VDD pins

(9) digital interface noise, injected during the next conversion as the binary number is transferred out; you can avoid this by grabbing a sample, performing the conversion, reading out the digital data, then grabbing next analog sample.

(10) any trash injected onto input pins or GNDs or VDDs or VREF pins from magnetic interference, electric interference, currents in the GNDs between Vin source and the ADC GND/RETURN pins.

I may have overlooked a few noise sources.

  • \$\begingroup\$ Thanks @analogsystemsrf, with all your knowledge about ADC noise, does the fact that grounding/floating/terminating to 50 Ohms all give the same RMS value identify the source of noise in my example? If so, does that noise depend on the input source's termination so that it adds to the signal via a voltage-divider relationship (e.g. 50%), or not so it adds directly (e.g. 100%)? \$\endgroup\$ – user46688 Jan 8 '18 at 5:23

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