I'm in the process of debugging microprocessor loading of a Spartan 6 image through SelectMap. The HSWAPEN pin has caught my eye. In my design it is pulled low via a 10K resistor. However, when reading the status register I notice that the HSWAPEN pin is read as high, and I've confirmed this with an oscilloscope.

Is this behaviour normal? This user guide (see page 62) explains:

HSWAPEN is a configuration-related multipurpose pin. When it is grounded prior to configuration, it enables internal pull-up resistors in all of the I/O pins of the device

Is HSWAPEN high because the internal pull-up is stronger than my pull-down?


All of the diagrams that I saw in the user guide as I took a quick pass have HSWAPEN tied directly to ground without a pull down resistor.

I couldn't find the HSWAPEN internal pull up resistance explicitly stated anywhere but Table 4 in the Datasheet gives the Thevenin equivalent resistance for programmable inputs and outputs. I'm assuming HSWAPEN would have a similar value since it can be used for User I/O after configuration. Depending on the grade device you are using, the values are different. But most are below 100Ω which would defiantly be stronger than your 10KΩ.

And here is a Xilinx forum thread where a user states that 10KΩ is too high and that 0Ω should be used instead.

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