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I am working on a reverse polarity protection circuit, similar to that in Figure 2 of SLVA139: Reverse Current/Battery Protection Circuits. Here is my circuit:

input circuit

My case is slightly more complex due to the possible input voltage ranging from 5-40V. Most MOSFETs seem to have a maximum gate-source voltage VGS of 20V, so I need the Zener clamp on the gate (or a very large/expensive FET). The maximum input current will be about 6A.

What I'm wondering is, what FET characteristics actually matter in this configuration? I know that I definitely want a drain-source breakdown voltage BVDSS high enough to handle the full input voltage in the reverse polarity condition. I'm also pretty sure I want to minimize RDS(on) as to not introduce any impedance in the ground circuit. Fairchild AN-9010: MOSFET Basics has this to say about operation in the Ohmic region:

"If the drain-to-source voltage is zero, the drain current also becomes zero regardless of gate–to-source voltage. This region is at the left side of the VGS– VGS(th)= VDS boundary line (VGS – VGS(th) > VDS > 0). Even if the drain current is very large, in this region the power dissipation is maintained by minimizing VDS(on)."

Does this configuration fall under the VDS = 0 classification? That seems like a somewhat dangerous assumption to make in a noisy environment (this will be operating in the vicinity of various types of motors), as any voltage offsets between input supply ground and local ground could cause current to flow. Even with that possibility, I'm not sure I need to spec for my maximum load current on the drain current ID. It would then follow that I don't need to dissipate very much power either. I suppose I could mitigate the problem by Zener clamping VGS closer to VGS(th) to reduce drain current/voltage?

Am I on the right track with this, or am I missing some critical detail that's going to make a tiny MOSFET blow up in my face?

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  • \$\begingroup\$ Ah, come on! KiCad is beautiful, why are you messing your schematic up, I bet you could draw something that looks better. \$\endgroup\$ – abdullah kahraman Jul 3 '12 at 11:01
  • \$\begingroup\$ @abdullahkahraman It's definitely not my best work. When I (recently) made the switch from Eagle, I wasn't a fan of the default resistor symbol being the IEC-style rectangle version and found a US sawtooth-style symbol in another library I have. It turns out the opendous library symbols are sized very inconsistently everything ends up looking awkward as a result. I'll probably end up cleaning up a copy of the converted Eagle rcl library symbols from library.oshec.org -- as-is they have a symbol for every package, bad default text positioning, etc. \$\endgroup\$ – Joe Baker Jul 4 '12 at 10:21
  • \$\begingroup\$ I am creating my own library symbols, based on the defaults. I create two different symbols for horizontal resistors and vertical resistors, aligning their texts, for example. It is a big work for once, then you speed up when you are using it. On the other hand, with no custom library, it is also easy to edit the text positioning on the fly. Just hit the M key and press R when needed.. \$\endgroup\$ – abdullah kahraman Jul 4 '12 at 19:38
  • \$\begingroup\$ Hope you will like KiCad soon :) Especially when you discover the "Repeat Last Item" function. I changed the hotkey of it to "Space", it is really easy and fast to draw schematics now. \$\endgroup\$ – abdullah kahraman Jul 4 '12 at 19:40
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The use of a MOSFET for reverse voltage protection is very straight forward.
Some of your references are correct but of low relevance and are tending to make the problem look more complex than it is. The key requirements (which you have essentially already identified) are

  • MOSFET must have enough Vds_max rating for maximum voltage applied

  • MOSFET Ids_max rating more than ample

  • Rdson as low as sensibly possible.

  • Vgs_max not exceeded in final circuit.

  • Power dissipation as installed able to sensibly handle operating power of I_operating^2 x Rdson_actual

  • Power dissipation as installed able to handle turn on and off higher dissipation regions.

  • Gate driven to cutoff "rapidly enough" in real world circuit.
    (Worst case - apply Vin correctly and then reverse Vin instantaneously. Is cutoff quick enough?)

In practice this is easily achieved in most cases.
Vin has little effect on operating dissipation.
Rdson needs to be rated for worst case liable to be experienced in practice. About 2 x headlined Rdson is usually safe OR examine data sheets carefully. Use worst case ratings - DO NOT use typical ratings.

Turn on may be slow if desired but note that dissipation needs to be allowed for.
Turn off under reverse polarity must be rapid to allow for sudden application of protection.


What is Iin max ?
You don't say what I_in_max is and this makes quite a difference in practice.


You cited:

"If the drain-to-source voltage is zero, the drain current also becomes zero regardless of gate–to-source voltage. This region is at the left side of the VGS– VGS(th)= VDS boundary line (VGS – VGS(th) > VDS > 0).

and

Even if the drain current is very large, in this region the power dissipation is maintained by minimizing VDS(on)."

Note that these are relatively independent thoughts by the writer. The first is essentially irrelevant to this application.
The second simply says that a low Rdson FET is a good idea.


You said:

Does this configuration fall under the VDS = 0 classification? That seems like a somewhat dangerous assumption to make in a noisy environment (this will be operating in the vicinity of various types of motors), as any voltage offsets between input supply ground and local ground could cause current to flow. Even with that possibility, I'm not sure I need to spec for my maximum load current on the drain current ID. It would then follow that I don't need to dissipate very much power either. I suppose I could mitigate the problem by Zener clamping VGS closer to VGS(th) to reduce drain current/voltage?

Too much thinking :-).

When Vin is OK get FET turned on asap.
Now Vds is as low as it is going to get and is set by Ids^2 x Rdson
Ids = your circuit current.
At 25C ambient Rds will start at value cited at 25C in spec sheet and will rise if/as FET heats. In most cases FET will not heat vastly.
eg 1 20 milliOhm FET at 1 amp gives 20 mW heating. Temperature rise is very low in any sensible pkg with minimal heatsinking. At 10A the dissipation = 10^2 x 0.020 = 2 Watts. This will need a DPAk or TO220 or SOT89 or better pkg and sensible heatsinking. Die temperature may be in 50-100C range and Rdson will increase over nominal 25C value. Worst case you may get say 40 milliOhm and 4 Watts. That is still easy enough to design for.

Added: Using the 6A max you subsequently provided.
PFet = I^2.R. R = P/i^2.
For 1 Watt disspation max you want Rdson = P/i^2 = 1/36 ~= 25 milliohm.
Very easily achieved.
At 10 milliohm P = I^2.R = 36 x 0.01 = 0.36W.
At 360 mW a TO220 will be warm but not hot with no heatsink but good airflow. A trace of flag heatsink will keep it happy.

The following are all under $1.40/1 & in stock at Digikey.

LFPACK 60V 90A 6.4 milliohm !!!!!!!!!!!

TO252 70V 90A 8 milliohm

TO220 60V 50A 8.1 milliohm


You said:

I suppose I could mitigate the problem by Zener clamping VGS closer to VGS(th) to reduce drain current/voltage?

No!
Best saved for last :-).
This is the exact opposite of what is required.
Your protector needs to have minimal impact on the controlled circuit.
The above has mjaximum impact and increases dissipation in protector over what can be achieved by using a sensibly low Rdson FET and turning it on hard.

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  • \$\begingroup\$ Good point, I added the max input current to the question. \$\endgroup\$ – Joe Baker Jul 4 '12 at 4:43
  • \$\begingroup\$ Outstanding answer; takes a complex problem and boils it down to nothing. Like going from War and Peace to a nursery rhyme. Questions and answers like these are what makes this site great! \$\endgroup\$ – macduff Feb 5 '14 at 1:21
  • \$\begingroup\$ @macduff - Thanks. I have possibly 100,000+ of these 'out there somewhere'. Used for reverse battery protection in a solar torch where the loss of a diode drop makes a significant difference to battery life and efficiency. If diode drop was even say 0.3V with a Schottky then at Vbat = 3.3V you lose 9% of your energy in the diode and drop available voltage to 3V so the boost converter has to try just that much harder. Who would stop to think that each of these has FET reverse battery protection and a boost converter :-) \$\endgroup\$ – Russell McMahon Feb 5 '14 at 8:46

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