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In a 4 bit ripple carry adder 4 full adders are connected serially, one FA waits for the carry input from the previous FA. My question is, when calculating the propagation delay, should we assume that the subsequent FAs won't start functioning until it receives carry from previous FA, or can at least the first XOR gate compute A XOR B even without carry input from previous FA?Full adder circuit:

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  • \$\begingroup\$ It's not clear hat restrictions you are talking about? FA is a white-box, so you take the critical path and calculate the propagation delay. And if you want to calculate the general case, you account for the worst case. \$\endgroup\$ – Eugene Sh. Jan 10 '18 at 16:29
  • \$\begingroup\$ Hi, I edited the question a little. Can you kindly check again? Thanks! @EugeneSh. \$\endgroup\$ – momo Jan 10 '18 at 16:44
  • \$\begingroup\$ Don't you only need 3 full adders to make what you want (not 4)? \$\endgroup\$ – Andy aka Jan 10 '18 at 16:55
  • \$\begingroup\$ A Half adder would work for the first bit and next 3 should be FA, I believe. @Andyaka \$\endgroup\$ – momo Jan 10 '18 at 17:00
  • \$\begingroup\$ The first adder adds the first two bits, the second adder adds bit 3 to the first sum and a 3rd adder adds bit 4. \$\endgroup\$ – Andy aka Jan 10 '18 at 17:04
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The addition of each A and B can start in the first XOR gate without the carry being valid. However, propagation of the correct value to S needs the carry input valid, and then some further time for the propagation of the second XOR gate.

You simply have to add up all the gates that the signal has to pass through, in series, add up all the delays, and take the worst case, for the propagation delay of the entire circuit.

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  • \$\begingroup\$ I request you to kindly give this question a look gateoverflow.in/8250/gate2015-2_48. If we assume that XORing can take place, answer is 12 whereas otherwise it would be 19.2. Hence my confusion. I thought there might be some rule that we don't know of. \$\endgroup\$ – momo Jan 11 '18 at 2:09

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