For a reason not clear to me I can not write to the EEPROM of the PIC16F18877. Programming is done with the XC8 compiler. Debugging with PICKIT3

The function works well in the simulator but fails to work in the actual situation.

I have reduced the code to a minimum with the main calling the function under test.

#include <xc.h>

void main(void)
     while(1) Test();

void  Test(void)
   uchar value = 0x09;
   uchar retval = 0;
   uchar address  = 0x0;
   retval = eeprom_read(address);

The test function is nothing more than the sample code from the Microchips site.

For the completeness I include also the pragma settings:

   // CONFIG1
    #pragma config FEXTOSC = HS     // External Oscillator mode selection bits (HS (crystal oscillator) above 4MHz; PFM set to high power)
    #pragma config RSTOSC = EXT1X   // Power-up default value for COSC bits (EXTOSC operating per FEXTOSC bits)
    #pragma config CLKOUTEN = OFF   // Clock Out Enable bit (CLKOUT function is disabled; i/o or oscillator function on OSC2)
    #pragma config CSWEN = ON       // Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
    #pragma config FCMEN = ON       // Fail-Safe Clock Monitor Enable bit (FSCM timer enabled)

    // CONFIG2
    #pragma config MCLRE = ON       // Master Clear Enable bit (MCLR pin is Master Clear function)
    #pragma config PWRTE = OFF      // Power-up Timer Enable bit (PWRT disabled)
    #pragma config LPBOREN = OFF    // Low-Power BOR enable bit (ULPBOR disabled)
    #pragma config BOREN = ON       // Brown-out reset enable bits (Brown-out Reset Enabled, SBOREN bit is ignored)
    #pragma config BORV = LO        // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices)
    #pragma config ZCD = OFF        // Zero-cross detect disable (Zero-cross detect circuit is disabled at POR.)
    #pragma config PPS1WAY = ON     // Peripheral Pin Select one-way control (The PPSLOCK bit can be cleared and set only once in software)
    #pragma config STVREN = ON      // Stack Overflow/Underflow Reset Enable bit (Stack Overflow or Underflow will cause a reset)

    // CONFIG3
    #pragma config WDTCPS = WDTCPS_31// WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
    #pragma config WDTE = OFF       // WDT operating mode (WDT Disabled, SWDTEN is ignored)
    #pragma config WDTCWS = WDTCWS_7// WDT Window Select bits (window always open (100%); software control; keyed access not required)
    #pragma config WDTCCS = SC      // WDT input clock selector (Software Control)

    // CONFIG4
    #pragma config WRT = OFF        // UserNVM self-write protection bits (Write protection off)
    #pragma config SCANE = available// Scanner Enable bit (Scanner module is available for use)
    #pragma config LVP = ON         // Low Voltage Programming Enable bit (Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.)

    // CONFIG5
    #pragma config CP = OFF         // UserNVM Program memory code protection bit (Program Memory code protection disabled)
    #pragma config CPD = OFF        // DataNVM code protection bit (Data EEPROM code protection disabled)

#define _XTAL_FREQ 20000000

main() and Test() are excerpts of a very large program brought back to these essentials.

What am I doing wrong. Help is appreciated.

  • \$\begingroup\$ How do you know it is not working? \$\endgroup\$
    – Eugene Sh.
    Jan 10, 2018 at 19:28
  • \$\begingroup\$ retval returns 0xFF. \$\endgroup\$
    – Decapod
    Jan 10, 2018 at 19:32
  • \$\begingroup\$ How do you see it? With a debugger? \$\endgroup\$
    – Eugene Sh.
    Jan 10, 2018 at 19:33
  • \$\begingroup\$ Correct with the pickit3 \$\endgroup\$
    – Decapod
    Jan 10, 2018 at 19:33
  • 2
    \$\begingroup\$ Everything is working now. It seems that Pickit 3 can not handle the expected debugging. Thanks for the assistance. \$\endgroup\$
    – Decapod
    Jan 10, 2018 at 20:04


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