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Suppose I'm tasked to build an AND gate for a large number of inputs, say 1024. I'd like to design a circuit that has 1024 relays in series, the "toggle" input of each being plugged to an input bit:

enter image description here

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Question 1: Is it realistic to think that the execution time does not depend on the number of input bits? Indeed, when the input bits are changed, the relays ought to toggle in parallel their state. The propagation between the left-hand side and right-hand side is then negligible.

Question 2: Does such a relay exist at a nanometer scale?

Thanks!

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    \$\begingroup\$ At nanometer scale, the left to right propagation time probably isn't negligible. \$\endgroup\$ – pjc50 Jan 10 '18 at 23:53
  • \$\begingroup\$ Given some CPUs will overclock at 8GHz, with 20 gate delays needed in a "cycle", this math tells us there are 6 picosecond CMOS gates available. \$\endgroup\$ – analogsystemsrf Jan 11 '18 at 4:00
  • \$\begingroup\$ In the electronics world propagation delays are often not negligible. If you (say) connected 1024 transmission gates in series the resistance would be rather large and the resulting AND gate would be very slow compared to each gate. \$\endgroup\$ – Spehro Pefhany Jan 11 '18 at 4:41
  • \$\begingroup\$ Thank you all for these very valuable comments. @SpehroPefhany: Wouldn't an idealized relay have no resistance? I have a very high level understanding of these; to me, it's basically an electrically-controlled switch, and switches should come with no resistance. \$\endgroup\$ – Michaël Jan 11 '18 at 10:43
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    \$\begingroup\$ @Michaël so I think there are three questions about context here: 1) is this for real implementation or just a theoretical construct? In which case sure you can idealise everything, and physical scale is irrelevant. 2) What is this actually for? 3) Define "negligible" for your application. \$\endgroup\$ – pjc50 Jan 11 '18 at 14:53
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You can use De Morgan's Rule to convert a 1024 AND gate into a 1024 NOR gate using xx nanometer lithographic Current Mode Logic that has a prop delay of 0.5ns max.

Then decide what speed and how many IC's meets your design budget.

enter image description here

OK sure but why?

BTW nanoscale size relays do exist but they are very slow compared to subnanosecond speeds like CML. They are also cost prohibitive and only for research.

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Does such a relay exist at a nanometer scale?

No.

MEMS relays have been demonstrated in R&D labs, but their size scale is (AFAIK) in the 10's of microns, not nanometers. Further, as far as I know, there is no such device available commercially.

Relays are generally made at millimeter scales in order to provide sufficient clearance and creepage distances to provide the galvanic isolation that most relay applications require.

Transistors can be made at nanometer scale and can provide essentially the functionality you're looking for. Google pass-transistor logic for further information. Rather than chaining 1000 pass-gate AND gates, you might need to include buffering of some kind every few (10? 50?) gates to ensure good noise margins.

But this is almost certainly not the most efficient way (in terms of area, power, and speed) to implement a 1000-input AND gate.

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  • \$\begingroup\$ Thanks very much. I've just seen that there are "Nanoelectromechanical relay" out there; are you saying these are not (even theoretically) a viable option? Again, my goal here is to have a 2-step evaluation process: one massively parallel, activating/deactivating the relays, and one step in which a signal is sent through the circuit formed by the relays. With a very large number of inputs, wouldn't that be (in theory maybe) the most efficient solution? \$\endgroup\$ – Michaël Jan 11 '18 at 10:48
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    \$\begingroup\$ Efficient in what sense? Power consumption? Time? When does your measurement start and end? Are you assuming instant propagation or real RLC delay? What do you need a 1000-input AND gate for anyway? \$\endgroup\$ – pjc50 Jan 11 '18 at 14:56
  • \$\begingroup\$ By efficient, I'm only referring to execution time. If propagation is instant and if a closed relay has no resistance, then I can picture that the approach is efficient in terms of execution time; I'm really asking if this is anywhere close to reality. As for what I need that for, I really don't, this is just uneducated curiosity :-) \$\endgroup\$ – Michaël Jan 12 '18 at 21:40
  • \$\begingroup\$ @Michaël, propagation is never "instant" if you look closely enough. At the very least there is speed-of-light limitation. So the definition of "close enough to instant" depends entirely on the requirements of your application. \$\endgroup\$ – The Photon Jan 12 '18 at 22:24
  • \$\begingroup\$ @ThePhoton: Thanks for the input! I'm indeed thinking of the propagation speed as being limited by that on a wire. Isn't it correct that propagation time on a wire is negligible compared to propagation through any kind of component? My formal definition of "close enough to instant" is really "dominated by the time it takes to switch a relay", since the complete execution time has to include one such switch. \$\endgroup\$ – Michaël Jan 12 '18 at 22:28
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I don't think it's possible to say without building a very detailed SPICE model with realistic parameters and comparing it against a conventional implementation.

Negligible really means dominated by the switch of a single relay. I want to say that even for a very large number of inputs, the execution time is dominated by, say, twice the switching speed of a single relay.

The thing is, I don't think you can get away with saying the wire delay is negligible in a nanostructure of lots of tiny relays, and then comparing against nonideal transistors. The wire running through all those relay contacts will have real R/L/C parameters.

How do these nanorelays compare in size to FETs? What sort of on resistance do they have? Do they have all the downsides of relays, such as minimum on ("wetting") current?

If you have nano relay contacts with a really tiny nano-gap, you could potentially send a pulse all the way through a chain of them even when they are OFF, across the capacitance of the gap.

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