7
\$\begingroup\$

enter image description here

I was told C6 is a bypass for the oscillator(X1). Now I have been building this circuit and I understand that in Eagle grounds are connected automatically and so are voltage sources without having to draw a net between them, which is nice. But why is C6 etc just floating shouldn't it be connected with the oscillator in one way or another? Let me know if clarification is needed. Thanks!

\$\endgroup\$
  • 3
    \$\begingroup\$ The left node of C6 isn't floating, it connects to +5V as indicated. This triangle with "+5V" or "+3.3V" (see R17) are also global nets just like the ground symbol. This is a very common way to show a supply connection without having to draw the supply line everywhere. To draw a floating pin the small triangle should not be there, example: pin 1 of X1. \$\endgroup\$ – Bimpelrekkie Jan 12 '18 at 6:50
  • 1
    \$\begingroup\$ draw it attached to pins 4 and 8 of X1 and you will quickly see how cluttered the schematic becomes \$\endgroup\$ – jsotola Jan 12 '18 at 7:44
  • \$\begingroup\$ See point 10 of electronics.stackexchange.com/a/28255/4512. \$\endgroup\$ – Olin Lathrop Jan 12 '18 at 12:26
8
\$\begingroup\$

Bypass or "de-coupling" capacitors which is their other name, do connect between a power rail and ground. As such, as you have already figured out, all those pins are electrically connected together.

That brings up an interesting situation when it comes to drawing them on the schematic.

You would think that the best way would be to draw them attached to the pin of the device you want them to be connected to so it is obvious what the capacitor is associated with.

That IS one approach, however many component symbols have hidden power and ground pins, as such, showing them attached to a particular IC is not always possible. It also makes for a very cluttered schematic. You can, if you wish, place them at the side instead, as you have shown, which visually implies that cap is associated with the thing it is nearest to.

However, even if you do a really good job of that, the PCB designer may or may not follow the schematic when placing the parts. The schematic after all is only a visual representation of the component and nets list.

In reality, the schematic design contains no actual positional information. The data passed to the PCB tool is merely a component list and a nets list. In the latter there will be a line like this..

3.3V, U1-14, U4-1, U4-6, X1-8, C5-1, C9-1, C6-1, R10-1, R12-1, R13-1,...

That defines what the net 3.3V is connected to. Note it does not say explicitly C5 is connected to U1-14, even if you drew it that way, just that all those pins are connected to 3.3V.

Most PCB layout tools, and designers, use what is called "rubber-banding" on a "rats-nest" layout to place components in locations that minimize the trace length and avoid too many crossovers and twisting.

enter image description here

Normally, the schematic designer only details the size of the board and where important things must be, like connectors, switches, LEDs etc. The PCB designer is trusted to place the rest, all be it with some review and approval by the schematic designer.

Unfortunately, since all those caps are attached to rails, depending on the software, they do not rubber-band well or, if you have power and ground planes, may not rubber-band at all.

If you draw your schematic with connections to the devices and the PCB designer is not informed about that and does not follow your schematic manually, the caps can end up in entirely different locations because the PCB designer knows to place them close to chip power pins all on their own.

That does not mean the PCB will have bad decoupling, but rather the C numbers on the schematic will no longer look like what is happening on the board. C5 may be in the position of C9 etc. As such, it is important to chat with the designer on this matter to ensure you both understand what is going to happen.

In some cases, if you trust the PCB designer to do his job, you can allow them to add or place all the capacitors on his own and use a "de-couplers" page in the schematic where all the caps are shown en-mass just for reference. A good PCB designer can even be trusted to add and maintain that page for you.

schematic

simulate this circuit – Schematic created using CircuitLab

Personally, I prefer the last method by far. It makes for much cleaner schematics and saves the PCB designer a lot of time not having to thumb through pages of schematics to identify hidden de-couplers before placing each one.

Whatever method you choose, good communication between designers is critical. It really is a team effort.

If you are doing both the schematic and the PCB design on your own you can use either method, though you will still find the common page, or schematic block, easier. Count how many you need in total and make a first stab at the de-coupler page then place them after you decide where the ICs are going to go. Then adjust the schematic to add or remove caps as required.

If you ARE using a PCB designer you should realize, in all likely-hood, he has probably designed far more boards than you will ever design in your lifetime. Listen to what he says and learn from his experience moderated by your own.

As always, ultimately it is the responsibility of you, the schematic designer, to review the PCB layout before production to ensure that sufficient de-couplers have been used and that they are placed correctly.

\$\endgroup\$
4
\$\begingroup\$

These are bypass capacitors, and should be connected between the VCC and ground of the IC they are bypassing for, as physically close as possible to the IC. So in short, "yes".

As for the schematic, while they are not physically shown as connected to the IC or X1 oscillator, they are electronically connected via the same node (5V and Gnd). They should be physically connected and physically located closely, as determined by the distance in the copper traces. Example:

enter image description here

\$\endgroup\$
  • 2
    \$\begingroup\$ +1 anyway, although it would have been nice to show a picture not from the Pleistocene. \$\endgroup\$ – Olin Lathrop Jan 12 '18 at 12:25
1
\$\begingroup\$

On the schematic it does not really matter where the bypass capacitors are drawn as long as they connect to the proper power and ground nets. Like you say they are automatically connected. In this case the C6 capacitor is (schematically) connected to the X1 oscillator pins because both components use the same net names, (power & ground symbols).

However when doing the PCB design you will need to physically place the capacitor close to the designated component pins, (in this case C6 should be placed very close to the power pins of the X1).

On simple schematics with adequate space you may see bypass capacitors actually placed on the components pins. Sometimes just the common +V pins will be connected. However in many cases, (especially on complex schematics or when there are many bypass capacitors), you may see a large number of capacitors drawn in one corner of the schematic.

More simply put, the out of the way placement of bypass capacitors on the schematic is just a kind of short cut method.

\$\endgroup\$
0
\$\begingroup\$

Schematics don't describe component placement in any way: even if you draw C6 really close to X1, a PCB which places those parts in the opposite corners is still conform to the schematic. Since the placement information is not there, there's no reason to pretend it is by cluttering the schematic with caps attached to devices they belong to.

If you need to convey placement information, you'll need a PCB layout file.

\$\endgroup\$
0
\$\begingroup\$

You are touching an important point here, that bypass capacitors are supposedly just connected between power and ground. It is not so simple, they play an important role for EMC. Their purpose is to make the loop for the HF component of the power supply current as small as possible.

So first of all you must place each capacitor as close as possible to its load (IC), or at least flatten the loop by running traces close together or over a ground plane. And second, you must prevent that other far away capacitors try to supply that current too. By parallelling multiple capacitors by means of inductive PCB traces (the current loops) you are creating series-resonant LC circuits, and it is possible that a farther capacitor offers a lower impedance than the nearest capacitor. A larger HF current may flow through a larger loop than the current that you are trying to decouple!

Thus you must decouple all capacitors from each other. I prefer using PCB-mount ferrite beads, i.e. wires that acts as lossy resistors only for HF current. This dampens any resonance and ensures that each capacitor decouples only its own load.

Do not put capacitors in parallel without considering the inductance of the wiring ! NB: a wire with ferrite bead from power supply to Vdd of the IC, capacitor from Vdd to Vss.

See https://en.wikipedia.org/wiki/Ferrite_bead

http://www.radio-electronics.com/info/data/inductors/ferrite-bead-inductors.php

http://www.analog.com/en/analog-dialogue/articles/ferrite-beads-demystified.html.

\$\endgroup\$
  • \$\begingroup\$ Happy Friday. General comment/tip, verbal regurgitation is making it less likely that anyone will bother to read this answer or vote it up. Learn to use paragraphs to break things up. \$\endgroup\$ – Trevor_G Jan 12 '18 at 16:17
  • 1
    \$\begingroup\$ Extra line feeds were automatically deleted from my post, thank you. I have no time to learn formatting text during working hours, I don't even know what standard or language you use. I used to post plain-text in newsgroups. \$\endgroup\$ – StessenJ Jan 12 '18 at 19:38
  • 1
    \$\begingroup\$ Yes you need to hit enter twice to get a paragraph break on here... it's a bit weird, singles just get ignored. For a plain new-line end the sentence with two spaces before the enter... Fortunately it shows you the formatted text under the edit box. \$\endgroup\$ – Trevor_G Jan 12 '18 at 19:41

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.