I want my component to receive data, and store it into an array, only if it isn't already in the array. Should be simple right?
library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity repetition is port( data_in: in unsigned(6 downto 0); start : in std_logic; output : out unsigned(6 downto 0)); end entity; architecture arh of repetition is signal i: integer := 0; type niz is array (6 downto 0) of unsigned(6 downto 0); signal niz1: niz; signal repeat: std_logic := '0'; begin process(start, repeat) variable ind : std_logic := '0'; begin if( to_integer(data_in) < 100) then if (start='0' or repeat = '1') then for j in 0 to 6 loop if(j<i) then if(data_in = niz1(j)) then ind := '1'; end if; end if; end loop; if (ind = '0') then niz1(i)<=data_in; i<=i+1; output<=data_in; repeat <= '0'; else repeat <= '1'; end if; end if; end if; end process; end arh;
i is an integer which tells us how far we have gottent into an array (of length 7), repeat is in the process sensitivity list, used to restart the process if an element is already present in the array and output outputs the newest unique input. When I run this, output is all 0s.
The thing that's really interesting is if I put if(ind = '1'), it takes the branch always, i.e., I believe it is somehow in advance updating i and the array, before the loop finishes, so it always finds that data it checks for is in the array.
How do I correct this?