I am planning to use the following layer stackup for my 10-layer PCB:
Layer 1 - Components / Short traces / GND Layer 2 - GND Layer 3 - Signals (vertical) Layer 4 - Signals (horizontal) Layer 5 - PWR / GND Layer 6 - PWR / GND Layer 7 - Signals (horizontal) Layer 8 - Signals (vertical) Layer 9 - GND Layer 10 - Components / Short traces / GND
The distances between the layers are not symmetrical and the thicknesses of 142.1 um and 124 um are alternated (this is given by the PCB manufacturer).
What has troubled me is what the reference planes for the return currents for high speed traces in layers 3, 4, 7 and 8 will be.
Let's take for example layers 3 and 4. They are between a GND plane on layer 2 and a Power plane on layer 5.
As it is well known, high speed signals will have their return currents on the trace's reference plane, following the route of the trace.
So in this particular case, will the return currents use layer 2 or 5 or both? Is the distance between the signal and the reference layers of any importance at all?
The background of the question is my concern regarding the power planes of layers 5 and 6. Since, naturally, there are many different power supplies, there is no such thing as continuous reference plane on these layers. So the question in the context of the return currents is, should I try to bridge the gaps with capacitors or I shouldn't care so much about it?