I am designing a voltage-controlled state variable filter for use in a modular synthesizer. Its function is to produce low-pass, band-pass, and high-pass responses for a given audio input signal. Corner frequency and resonance (Q) are determined by LM13700 amplifier bias currents, which are controlled by external voltages.

Here is the circuit I'm simulating and breadboarding. Resonance control is simplified in this schematic, and signal ac-coupling and output buffering is not shown.

Circuit schematic

Behavior of the simulation and breadboard prototype is as-expected for normal control voltage and signal input frequencies in the range of <1Hz to 20KHz.

Out of curiosity I simulated the circuit to 100MHz and found that, in the 50KHz-200KHz range, gain starts increasing. This is most visible in the low-pass output. The frequency at which gain increases is independent of Q and corner frequency, and seems to be determined entirely by the op amps used for U6 and U7. Responses for TL072 and LT1022 show a 180-degree phase shift at different frequencies, leading me to believe this is non-ideal op amp behavior.

TL072 response

LT1022 response

I am not too concerned since the circuit functions properly in its intended application, but would like to understand why this is happening.


Is non-ideal op amp behavior the cause of this high frequency behavior? If so, what parameters are relevant?

  • 1
    \$\begingroup\$ -70dB is a gain of 0.0003; that's insignificant in most applications. \$\endgroup\$
    – Chu
    Jan 17, 2018 at 8:04
  • \$\begingroup\$ Try simulating a simple TL072 op-amp circuit and see what you get. \$\endgroup\$
    – Andy aka
    Jan 17, 2018 at 11:24
  • \$\begingroup\$ In contrast to @Andyaka I would try using ideal op-amps everywhere to see if this removes the notch. My intuition says that this is likely to just be the typical behaviour of the topology however, and shouldn't cause any problems. \$\endgroup\$
    – loudnoises
    Jan 17, 2018 at 12:42
  • \$\begingroup\$ The increase in gain is not an issue in my application. My question is 'why it is there?' I will try again with ideal op-amps tonight. If this is the typical behavior of the topology--why? What in the circuit causes the increase in low-pass gain at high frequencies? \$\endgroup\$
    – vofa
    Jan 17, 2018 at 16:07

2 Answers 2


Here is the output impedance of a 1uA Idd opamp, the MCP6031.

The opamp has plenty of drive strength---Iout is 50mA.

But the opamp has only 10,000 Hz UnityGainBandWidth, hence attempting any performance near or above 10,000 Hz is doomed to failure.

Additionally, the opamp's output impedance at 10Khz is 100,000 ohms; the opamp (consuming only 1uA for the internal FETs) simply cannot charge and discharge any capacitors at high frequencies.

Your example has the same challenges. The opamp's Rout (Zout) starts rising as soon as your frequency is above the -3dB of the OPEN LOOP RESPONSE. For many opamps, that frequency is 10Hz or close.

Walt Jung (of Analog Devices, et al as consultant) wrote of the failure of active filters at higher frequencies, many decades ago. His example: to achieve 40dB stop-band rejection at 1MHz, the opamp needs UGBW of at least 100MHz.

enter image description here


The shown problems at higher frequencies are typical for all inverting opamp applications. Here, the last stage is an inverting integrator circuit with capacitive feedback.

What happens as a result of high frequencies at the input of the last stage? There are 3 major effects:

(a) The open-loop gain of the opamp drops continuously so that the circuit cannot work properly anymore,

(b) the impedance of the feedback element (capacitor) is reduced continuously and

(c) there is, therefore, a rising part of the input signal that arrives at the output node using a "wrong" way: Directly through the capacitor. This current, which is NOT driven by the amplifiers output node, causes a rising output voltage across the finite output resistance of the opamp. It is even worse, because this finite output resistance is not constant but goes high with rising frequencies.

As a result, the ouput signal goes high with the frequency because of this unwanted effect (parasitic portion of the input arrives the output node with an even increasing characteristic).


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