I am working at an FGPA shop right now using Xilinx FPGAs. I do not have a ton of experience with designing logic, especially when it comes to microprocessors. One of the big movements my team is looking at is to adopt High Level Synthesis (HLS) which translates an algorithm written in C down to RTL that can then be placed and routed onto an FPGA or even forwarded to an ASIC design.

A similar question was asked here Convert C to FPGA, but I want to direct the response of this question directly to the architecture of a microprocessor.

My question is what would it take to implement an algorithm for a microprocessor? You obviously have the ISA, so I am assuming the your inputs would be each operand, depending on how many your processor takes, and the op code? I am assuming there would need to be some buffer allocated to represent the caches/registers for the architecture? Also, you would probably need to allocate space for RAM since ISAs have register indirect operations that might require those type of memories to be already allocated.

For example, lets say I want to make an Intel 8008. Can you give me pseudocode to demonstrate the algorithm that can be put through a high level synthesizer to get that hardware?


When I ask for pseudo code I obviously do not mean a full product. I just want the major steps that would be involved in the design of the algorithm. I am guessing it would revolve around fetching, decoding, and executing the input to the function. The comments with the emulators and the AUGH look like they will be a big help.


closed as too broad by Chris Stratton, Marcus Müller, RoyC, DoxyLover, Sparky256 Jan 18 '18 at 1:31

Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. Avoid asking multiple distinct questions at once. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

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    \$\begingroup\$ Sort of like going around your elbow to suck your thumb... \$\endgroup\$ – Sparky256 Jan 17 '18 at 4:06
  • \$\begingroup\$ People have been writing CPUs in C or all kinds of languages for decades, yes, emulators. If you google for "8008 emulator" you can even find ones written in javascript or php. \$\endgroup\$ – user3528438 Jan 17 '18 at 4:11
  • \$\begingroup\$ "Can you give me the code" questions are disallowed here as across most of the SE system. \$\endgroup\$ – Chris Stratton Jan 17 '18 at 4:50
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    \$\begingroup\$ Speaking from experience. High level synthesis will only work if you understand the low level stuff. A lot of times you will need to have go between logic between the high and low level stuff. High level logic is more like macro's for C. You will also fill up that FPGA really really fast. It is also good for paralleling code, but probably not well suited for algorithms. \$\endgroup\$ – Voltage Spike Jan 17 '18 at 7:08
  • \$\begingroup\$ I'm voting to close this question as off-topic because asking for specific code is essentially the same as asking for a schematic or asking for a product; in the spirit of the "too broad" and "no product rec" close reasons, I vtc. \$\endgroup\$ – Marcus Müller Jan 17 '18 at 8:06

This article by Ken Chapman goes through the design process that was used to create the PicoBlaze processor used in Xilinx FPGAs.


The article doesn't specifically talk about C. But the point is to try and implement the logic in a similar way to what is described.


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